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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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drm/exynos: fimd: move window protect code to prepare/cleanup_plane
Only set/clear the update bit in the CRTC's .atomic_begin()/flush() so all planes are really committed at the same time. Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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@ -591,6 +591,16 @@ static void fimd_shadow_protect_win(struct fimd_context *ctx,
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{
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u32 reg, bits, val;
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/*
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* SHADOWCON/PRTCON register is used for enabling timing.
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*
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* for example, once only width value of a register is set,
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* if the dma is started then fimd hardware could malfunction so
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* with protect window setting, the register fields with prefix '_F'
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* wouldn't be updated at vsync also but updated once unprotect window
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* is set.
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*/
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if (ctx->driver_data->has_shadowcon) {
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reg = SHADOWCON;
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bits = SHADOWCON_WINx_PROTECT(win);
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@ -607,6 +617,28 @@ static void fimd_shadow_protect_win(struct fimd_context *ctx,
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writel(val, ctx->regs + reg);
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}
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static void fimd_atomic_begin(struct exynos_drm_crtc *crtc,
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struct exynos_drm_plane *plane)
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{
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struct fimd_context *ctx = crtc->ctx;
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if (ctx->suspended)
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return;
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fimd_shadow_protect_win(ctx, plane->zpos, true);
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}
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static void fimd_atomic_flush(struct exynos_drm_crtc *crtc,
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struct exynos_drm_plane *plane)
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{
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struct fimd_context *ctx = crtc->ctx;
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if (ctx->suspended)
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return;
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fimd_shadow_protect_win(ctx, plane->zpos, false);
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}
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static void fimd_update_plane(struct exynos_drm_crtc *crtc,
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struct exynos_drm_plane *plane)
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{
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@ -622,20 +654,6 @@ static void fimd_update_plane(struct exynos_drm_crtc *crtc,
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if (ctx->suspended)
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return;
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/*
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* SHADOWCON/PRTCON register is used for enabling timing.
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*
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* for example, once only width value of a register is set,
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* if the dma is started then fimd hardware could malfunction so
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* with protect window setting, the register fields with prefix '_F'
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* wouldn't be updated at vsync also but updated once unprotect window
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* is set.
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*/
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/* protect windows */
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fimd_shadow_protect_win(ctx, win, true);
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offset = plane->src_x * bpp;
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offset += plane->src_y * pitch;
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@ -707,9 +725,6 @@ static void fimd_update_plane(struct exynos_drm_crtc *crtc,
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if (ctx->driver_data->has_shadowcon)
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fimd_enable_shadow_channel_path(ctx, win, true);
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/* Enable DMA channel and unprotect windows */
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fimd_shadow_protect_win(ctx, win, false);
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if (ctx->i80_if)
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atomic_set(&ctx->win_updated, 1);
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}
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@ -723,16 +738,10 @@ static void fimd_disable_plane(struct exynos_drm_crtc *crtc,
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if (ctx->suspended)
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return;
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/* protect windows */
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fimd_shadow_protect_win(ctx, win, true);
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fimd_enable_video_output(ctx, win, false);
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if (ctx->driver_data->has_shadowcon)
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fimd_enable_shadow_channel_path(ctx, win, false);
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/* unprotect windows */
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fimd_shadow_protect_win(ctx, win, false);
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}
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static void fimd_enable(struct exynos_drm_crtc *crtc)
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@ -875,8 +884,10 @@ static const struct exynos_drm_crtc_ops fimd_crtc_ops = {
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.enable_vblank = fimd_enable_vblank,
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.disable_vblank = fimd_disable_vblank,
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.wait_for_vblank = fimd_wait_for_vblank,
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.atomic_begin = fimd_atomic_begin,
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.update_plane = fimd_update_plane,
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.disable_plane = fimd_disable_plane,
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.atomic_flush = fimd_atomic_flush,
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.te_handler = fimd_te_handler,
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.clock_enable = fimd_dp_clock_enable,
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};
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