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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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drm/amdgpu/VCN2: expose rings functions
They can be reused by VCN2.x family Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Leo Liu
Alex Deucher
parent
22a8f44286
commit
cdbd115eaf
@ -1490,7 +1490,7 @@ static void vcn_v2_0_dec_ring_set_wptr(struct amdgpu_ring *ring)
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*
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* Write a start command to the ring.
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*/
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static void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring)
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void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring)
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{
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struct amdgpu_device *adev = ring->adev;
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@ -1507,7 +1507,7 @@ static void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring)
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*
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* Write a end command to the ring.
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*/
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static void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring)
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void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring)
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{
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struct amdgpu_device *adev = ring->adev;
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@ -1522,7 +1522,7 @@ static void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring)
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*
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* Write a nop command to the ring.
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*/
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static void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
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void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
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{
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struct amdgpu_device *adev = ring->adev;
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int i;
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@ -1543,8 +1543,8 @@ static void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t coun
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*
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* Write a fence and a trap command to the ring.
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*/
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static void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
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unsigned flags)
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void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
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unsigned flags)
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{
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struct amdgpu_device *adev = ring->adev;
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@ -1580,10 +1580,10 @@ static void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64
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*
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* Write ring commands to execute the indirect buffer
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*/
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static void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring,
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struct amdgpu_job *job,
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struct amdgpu_ib *ib,
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uint32_t flags)
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void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring,
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struct amdgpu_job *job,
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struct amdgpu_ib *ib,
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uint32_t flags)
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{
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struct amdgpu_device *adev = ring->adev;
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unsigned vmid = AMDGPU_JOB_GET_VMID(job);
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@ -1599,9 +1599,8 @@ static void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring,
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amdgpu_ring_write(ring, ib->length_dw);
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}
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static void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring,
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uint32_t reg, uint32_t val,
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uint32_t mask)
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void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
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uint32_t val, uint32_t mask)
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{
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struct amdgpu_device *adev = ring->adev;
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@ -1619,8 +1618,8 @@ static void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring,
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amdgpu_ring_write(ring, VCN_DEC_CMD_REG_READ_COND_WAIT << 1);
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}
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static void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring,
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unsigned vmid, uint64_t pd_addr)
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void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring,
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unsigned vmid, uint64_t pd_addr)
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{
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struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
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uint32_t data0, data1, mask;
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@ -1634,8 +1633,8 @@ static void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring,
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vcn_v2_0_dec_ring_emit_reg_wait(ring, data0, data1, mask);
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}
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static void vcn_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring,
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uint32_t reg, uint32_t val)
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void vcn_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring,
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uint32_t reg, uint32_t val)
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{
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struct amdgpu_device *adev = ring->adev;
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@ -1727,8 +1726,8 @@ static void vcn_v2_0_enc_ring_set_wptr(struct amdgpu_ring *ring)
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*
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* Write enc a fence and a trap command to the ring.
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*/
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static void vcn_v2_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
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u64 seq, unsigned flags)
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void vcn_v2_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
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u64 seq, unsigned flags)
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{
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WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
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@ -1739,7 +1738,7 @@ static void vcn_v2_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
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amdgpu_ring_write(ring, VCN_ENC_CMD_TRAP);
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}
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static void vcn_v2_0_enc_ring_insert_end(struct amdgpu_ring *ring)
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void vcn_v2_0_enc_ring_insert_end(struct amdgpu_ring *ring)
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{
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amdgpu_ring_write(ring, VCN_ENC_CMD_END);
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}
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@ -1752,10 +1751,10 @@ static void vcn_v2_0_enc_ring_insert_end(struct amdgpu_ring *ring)
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*
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* Write enc ring commands to execute the indirect buffer
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*/
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static void vcn_v2_0_enc_ring_emit_ib(struct amdgpu_ring *ring,
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struct amdgpu_job *job,
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struct amdgpu_ib *ib,
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uint32_t flags)
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void vcn_v2_0_enc_ring_emit_ib(struct amdgpu_ring *ring,
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struct amdgpu_job *job,
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struct amdgpu_ib *ib,
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uint32_t flags)
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{
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unsigned vmid = AMDGPU_JOB_GET_VMID(job);
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@ -1766,9 +1765,8 @@ static void vcn_v2_0_enc_ring_emit_ib(struct amdgpu_ring *ring,
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amdgpu_ring_write(ring, ib->length_dw);
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}
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static void vcn_v2_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring,
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uint32_t reg, uint32_t val,
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uint32_t mask)
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void vcn_v2_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
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uint32_t val, uint32_t mask)
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{
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amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WAIT);
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amdgpu_ring_write(ring, reg << 2);
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@ -1776,8 +1774,8 @@ static void vcn_v2_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring,
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amdgpu_ring_write(ring, val);
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}
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static void vcn_v2_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
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unsigned int vmid, uint64_t pd_addr)
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void vcn_v2_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
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unsigned int vmid, uint64_t pd_addr)
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{
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struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
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@ -1788,8 +1786,7 @@ static void vcn_v2_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
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lower_32_bits(pd_addr), 0xffffffff);
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}
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static void vcn_v2_0_enc_ring_emit_wreg(struct amdgpu_ring *ring,
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uint32_t reg, uint32_t val)
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void vcn_v2_0_enc_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val)
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{
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amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WRITE);
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amdgpu_ring_write(ring, reg << 2);
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@ -1853,7 +1850,7 @@ static void vcn_v2_0_jpeg_ring_set_wptr(struct amdgpu_ring *ring)
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*
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* Write a start command to the ring.
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*/
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static void vcn_v2_0_jpeg_ring_insert_start(struct amdgpu_ring *ring)
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void vcn_v2_0_jpeg_ring_insert_start(struct amdgpu_ring *ring)
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{
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amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
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0, 0, PACKETJ_TYPE0));
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@ -1871,7 +1868,7 @@ static void vcn_v2_0_jpeg_ring_insert_start(struct amdgpu_ring *ring)
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*
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* Write a end command to the ring.
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*/
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static void vcn_v2_0_jpeg_ring_insert_end(struct amdgpu_ring *ring)
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void vcn_v2_0_jpeg_ring_insert_end(struct amdgpu_ring *ring)
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{
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amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,
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0, 0, PACKETJ_TYPE0));
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@ -1890,8 +1887,8 @@ static void vcn_v2_0_jpeg_ring_insert_end(struct amdgpu_ring *ring)
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*
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* Write a fence and a trap command to the ring.
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*/
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static void vcn_v2_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
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unsigned flags)
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void vcn_v2_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
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unsigned flags)
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{
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WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT);
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@ -1939,10 +1936,10 @@ static void vcn_v2_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u6
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*
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* Write ring commands to execute the indirect buffer.
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*/
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static void vcn_v2_0_jpeg_ring_emit_ib(struct amdgpu_ring *ring,
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struct amdgpu_job *job,
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struct amdgpu_ib *ib,
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uint32_t flags)
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void vcn_v2_0_jpeg_ring_emit_ib(struct amdgpu_ring *ring,
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struct amdgpu_job *job,
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struct amdgpu_ib *ib,
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uint32_t flags)
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{
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unsigned vmid = AMDGPU_JOB_GET_VMID(job);
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@ -1990,9 +1987,8 @@ static void vcn_v2_0_jpeg_ring_emit_ib(struct amdgpu_ring *ring,
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amdgpu_ring_write(ring, 0x2);
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}
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static void vcn_v2_0_jpeg_ring_emit_reg_wait(struct amdgpu_ring *ring,
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uint32_t reg, uint32_t val,
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uint32_t mask)
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void vcn_v2_0_jpeg_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
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uint32_t val, uint32_t mask)
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{
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uint32_t reg_offset = (reg << 2);
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@ -2018,8 +2014,8 @@ static void vcn_v2_0_jpeg_ring_emit_reg_wait(struct amdgpu_ring *ring,
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amdgpu_ring_write(ring, mask);
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}
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static void vcn_v2_0_jpeg_ring_emit_vm_flush(struct amdgpu_ring *ring,
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unsigned vmid, uint64_t pd_addr)
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void vcn_v2_0_jpeg_ring_emit_vm_flush(struct amdgpu_ring *ring,
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unsigned vmid, uint64_t pd_addr)
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{
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struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
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uint32_t data0, data1, mask;
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@ -2033,8 +2029,7 @@ static void vcn_v2_0_jpeg_ring_emit_vm_flush(struct amdgpu_ring *ring,
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vcn_v2_0_jpeg_ring_emit_reg_wait(ring, data0, data1, mask);
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}
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static void vcn_v2_0_jpeg_ring_emit_wreg(struct amdgpu_ring *ring,
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uint32_t reg, uint32_t val)
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void vcn_v2_0_jpeg_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val)
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{
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uint32_t reg_offset = (reg << 2);
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@ -2052,7 +2047,7 @@ static void vcn_v2_0_jpeg_ring_emit_wreg(struct amdgpu_ring *ring,
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amdgpu_ring_write(ring, val);
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}
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static void vcn_v2_0_jpeg_ring_nop(struct amdgpu_ring *ring, uint32_t count)
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void vcn_v2_0_jpeg_ring_nop(struct amdgpu_ring *ring, uint32_t count)
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{
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int i;
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@ -24,6 +24,44 @@
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#ifndef __VCN_V2_0_H__
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#define __VCN_V2_0_H__
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extern void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring);
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extern void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring);
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extern void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count);
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extern void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
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unsigned flags);
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extern void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job,
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struct amdgpu_ib *ib, uint32_t flags);
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extern void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
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uint32_t val, uint32_t mask);
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extern void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring,
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unsigned vmid, uint64_t pd_addr);
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extern void vcn_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring,
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uint32_t reg, uint32_t val);
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extern void vcn_v2_0_enc_ring_insert_end(struct amdgpu_ring *ring);
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extern void vcn_v2_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,
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u64 seq, unsigned flags);
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extern void vcn_v2_0_enc_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job,
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struct amdgpu_ib *ib, uint32_t flags);
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extern void vcn_v2_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
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uint32_t val, uint32_t mask);
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extern void vcn_v2_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
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unsigned int vmid, uint64_t pd_addr);
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extern void vcn_v2_0_enc_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
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extern void vcn_v2_0_jpeg_ring_insert_start(struct amdgpu_ring *ring);
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extern void vcn_v2_0_jpeg_ring_insert_end(struct amdgpu_ring *ring);
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extern void vcn_v2_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
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unsigned flags);
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extern void vcn_v2_0_jpeg_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job,
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struct amdgpu_ib *ib, uint32_t flags);
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extern void vcn_v2_0_jpeg_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
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uint32_t val, uint32_t mask);
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extern void vcn_v2_0_jpeg_ring_emit_vm_flush(struct amdgpu_ring *ring,
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unsigned vmid, uint64_t pd_addr);
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extern void vcn_v2_0_jpeg_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
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extern void vcn_v2_0_jpeg_ring_nop(struct amdgpu_ring *ring, uint32_t count);
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extern const struct amdgpu_ip_block_version vcn_v2_0_ip_block;
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#endif /* __VCN_V2_0_H__ */
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