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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-02-13 21:09:11 +07:00
ath9k: Remove ath_tx_aggr_resp()
Accessing mac80211's internal state machine is wrong. Will add resumption of a TID in a later patch. Signed-off-by: Sujith <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -588,14 +588,6 @@ enum ATH_AGGR_STATUS {
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ATH_AGGR_8K_LIMITED,
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ATH_AGGR_8K_LIMITED,
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};
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};
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enum ATH_AGGR_CHECK {
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AGGR_NOT_REQUIRED,
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AGGR_REQUIRED,
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AGGR_CLEANUP_PROGRESS,
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AGGR_EXCHANGE_PROGRESS,
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AGGR_EXCHANGE_DONE
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};
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struct aggr_rifs_param {
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struct aggr_rifs_param {
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int param_max_frames;
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int param_max_frames;
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int param_max_len;
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int param_max_len;
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@ -621,8 +613,7 @@ struct ath_node {
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void ath_tx_resume_tid(struct ath_softc *sc,
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void ath_tx_resume_tid(struct ath_softc *sc,
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struct ath_atx_tid *tid);
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struct ath_atx_tid *tid);
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enum ATH_AGGR_CHECK ath_tx_aggr_check(struct ath_softc *sc,
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bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno);
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struct ath_node *an, u8 tidno);
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void ath_tx_aggr_teardown(struct ath_softc *sc,
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void ath_tx_aggr_teardown(struct ath_softc *sc,
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struct ath_node *an, u8 tidno);
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struct ath_node *an, u8 tidno);
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void ath_rx_aggr_teardown(struct ath_softc *sc,
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void ath_rx_aggr_teardown(struct ath_softc *sc,
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@ -1879,49 +1879,6 @@ static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband,
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tx_info->control.vif = NULL;
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tx_info->control.vif = NULL;
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}
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}
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static void ath_tx_aggr_resp(struct ath_softc *sc,
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struct ieee80211_supported_band *sband,
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struct ieee80211_sta *sta,
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struct ath_node *an,
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u8 tidno)
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{
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struct ath_atx_tid *txtid;
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u16 buffersize = 0;
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int state;
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struct sta_info *si;
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if (!(sc->sc_flags & SC_OP_TXAGGR))
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return;
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txtid = ATH_AN_2_TID(an, tidno);
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if (!txtid->paused)
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return;
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/*
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* XXX: This is entirely busted, we aren't supposed to
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* access the sta from here because it's internal
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* to mac80211, and looking at the state without
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* locking is wrong too.
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*/
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si = container_of(sta, struct sta_info, sta);
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buffersize = IEEE80211_MIN_AMPDU_BUF <<
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sband->ht_cap.ampdu_factor; /* FIXME */
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state = si->ampdu_mlme.tid_state_tx[tidno];
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if (state & HT_ADDBA_RECEIVED_MSK) {
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txtid->state |= AGGR_ADDBA_COMPLETE;
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txtid->state &= ~AGGR_ADDBA_PROGRESS;
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txtid->baw_size = buffersize;
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DPRINTF(sc, ATH_DBG_AGGR,
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"%s: Resuming tid, buffersize: %d\n",
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__func__,
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buffersize);
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ath_tx_resume_tid(sc, txtid);
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}
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}
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static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta,
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static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta,
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struct ieee80211_tx_rate_control *txrc)
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struct ieee80211_tx_rate_control *txrc)
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{
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{
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@ -1934,7 +1891,7 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta,
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struct ath_rate_node *ath_rc_priv = priv_sta;
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struct ath_rate_node *ath_rc_priv = priv_sta;
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struct ath_node *an;
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struct ath_node *an;
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struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
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struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
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int is_probe = FALSE, chk, ret;
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int is_probe = FALSE;
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s8 lowest_idx;
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s8 lowest_idx;
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__le16 fc = hdr->frame_control;
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__le16 fc = hdr->frame_control;
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u8 *qc, tid;
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u8 *qc, tid;
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@ -1981,26 +1938,10 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta,
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if (ieee80211_is_data_qos(fc)) {
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if (ieee80211_is_data_qos(fc)) {
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qc = ieee80211_get_qos_ctl(hdr);
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qc = ieee80211_get_qos_ctl(hdr);
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tid = qc[0] & 0xf;
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tid = qc[0] & 0xf;
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an = (struct ath_node *)sta->drv_priv;
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an = (struct ath_node *)sta->drv_priv;
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chk = ath_tx_aggr_check(sc, an, tid);
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if(ath_tx_aggr_check(sc, an, tid))
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if (chk == AGGR_REQUIRED) {
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ieee80211_start_tx_ba_session(hw, hdr->addr1, tid);
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ret = ieee80211_start_tx_ba_session(hw,
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hdr->addr1, tid);
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if (ret)
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DPRINTF(sc, ATH_DBG_AGGR,
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"%s: Unable to start tx "
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"aggr for: %pM\n",
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__func__,
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hdr->addr1);
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else
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DPRINTF(sc, ATH_DBG_AGGR,
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"%s: Started tx aggr for: %pM\n",
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__func__,
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hdr->addr1);
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} else if (chk == AGGR_EXCHANGE_PROGRESS)
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ath_tx_aggr_resp(sc, sband, sta, an, tid);
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}
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}
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}
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}
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}
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}
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@ -2322,28 +2322,24 @@ u32 ath_txq_aggr_depth(struct ath_softc *sc, int qnum)
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return sc->sc_txq[qnum].axq_aggr_depth;
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return sc->sc_txq[qnum].axq_aggr_depth;
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}
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}
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/* Check if an ADDBA is required. A valid node must be passed. */
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bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno)
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enum ATH_AGGR_CHECK ath_tx_aggr_check(struct ath_softc *sc,
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struct ath_node *an,
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u8 tidno)
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{
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{
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struct ath_atx_tid *txtid;
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struct ath_atx_tid *txtid;
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if (!(sc->sc_flags & SC_OP_TXAGGR))
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if (!(sc->sc_flags & SC_OP_TXAGGR))
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return AGGR_NOT_REQUIRED;
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return false;
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/* ADDBA exchange must be completed before sending aggregates */
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txtid = ATH_AN_2_TID(an, tidno);
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txtid = ATH_AN_2_TID(an, tidno);
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if (!(txtid->state & AGGR_ADDBA_COMPLETE)) {
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if (!(txtid->state & AGGR_ADDBA_COMPLETE)) {
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if (!(txtid->state & AGGR_ADDBA_PROGRESS) &&
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if (!(txtid->state & AGGR_ADDBA_PROGRESS) &&
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(txtid->addba_exchangeattempts < ADDBA_EXCHANGE_ATTEMPTS)) {
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(txtid->addba_exchangeattempts < ADDBA_EXCHANGE_ATTEMPTS)) {
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txtid->addba_exchangeattempts++;
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txtid->addba_exchangeattempts++;
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return AGGR_REQUIRED;
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return true;
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}
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}
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}
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}
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return AGGR_NOT_REQUIRED;
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return false;
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}
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}
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/* Start TX aggregation */
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/* Start TX aggregation */
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