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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 13:50:52 +07:00
[ALSA] trivial: Code clean up of i2c/cs8427.c
- Fix spaces, wrap lines in 80 columns. - Move EXPORT_SYMBOL() adjacent to each function. Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
This commit is contained in:
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7fd37481b1
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cc63935f56
@ -76,23 +76,28 @@ int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg,
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buf[0] = reg & 0x7f;
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buf[1] = val;
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if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) {
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snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x to CS8427 (%i)\n", buf[0], buf[1], err);
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snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x "
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"to CS8427 (%i)\n", buf[0], buf[1], err);
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return err < 0 ? err : -EIO;
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}
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return 0;
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}
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EXPORT_SYMBOL(snd_cs8427_reg_write);
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static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg)
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{
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int err;
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unsigned char buf;
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if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) {
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snd_printk(KERN_ERR "unable to send register 0x%x byte to CS8427\n", reg);
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snd_printk(KERN_ERR "unable to send register 0x%x byte "
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"to CS8427\n", reg);
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return err < 0 ? err : -EIO;
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}
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if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) {
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snd_printk(KERN_ERR "unable to read register 0x%x byte from CS8427\n", reg);
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snd_printk(KERN_ERR "unable to read register 0x%x byte "
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"from CS8427\n", reg);
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return err < 0 ? err : -EIO;
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}
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return buf;
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@ -121,7 +126,8 @@ static int snd_cs8427_send_corudata(struct snd_i2c_device *device,
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int count)
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{
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struct cs8427 *chip = device->private_data;
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char *hw_data = udata ? chip->playback.hw_udata : chip->playback.hw_status;
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char *hw_data = udata ?
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chip->playback.hw_udata : chip->playback.hw_status;
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char data[32];
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int err, idx;
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@ -134,11 +140,11 @@ static int snd_cs8427_send_corudata(struct snd_i2c_device *device,
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memset(data, 0, sizeof(data));
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if (memcmp(hw_data, data, count) == 0) {
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chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
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chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS | CS8427_EFTUI;
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if ((err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF,
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chip->regmap[CS8427_REG_UDATABUF])) < 0)
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return err;
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return 0;
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chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS |
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CS8427_EFTUI;
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err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF,
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chip->regmap[CS8427_REG_UDATABUF]);
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return err < 0 ? err : 0;
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}
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}
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data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
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@ -161,24 +167,32 @@ int snd_cs8427_create(struct snd_i2c_bus *bus,
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{
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static unsigned char initvals1[] = {
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CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
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/* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes, TCBL=output */
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/* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
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TCBL=output */
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CS8427_SWCLK | CS8427_TCBLDIR,
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/* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs, normal stereo operation */
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/* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
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normal stereo operation */
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0x00,
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/* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial, Rx=>serial */
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/* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial,
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Rx=>serial */
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CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
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/* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs, output time base = OMCK, input time base =
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recovered input clock, recovered input clock source is ILRCK changed to AES3INPUT (workaround, see snd_cs8427_reset) */
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/* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
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output time base = OMCK, input time base = recovered input clock,
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recovered input clock source is ILRCK changed to AES3INPUT
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(workaround, see snd_cs8427_reset) */
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CS8427_RXDILRCK,
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/* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S, 24-bit, 64*Fsi */
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/* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
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24-bit, 64*Fsi */
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CS8427_SIDEL | CS8427_SILRPOL,
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/* CS8427_REG_SERIALOUTPUT: Serial audio output port data format = I2S, 24-bit, 64*Fsi */
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/* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
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= I2S, 24-bit, 64*Fsi */
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CS8427_SODEL | CS8427_SOLRPOL,
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};
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static unsigned char initvals2[] = {
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CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
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/* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence, biphase, parity status bits */
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/* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR, */
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/* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
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biphase, parity status bits */
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/* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/
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0xff, /* set everything */
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/* CS8427_REG_CSDATABUF:
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Registers 32-55 window to CS buffer
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@ -201,7 +215,8 @@ int snd_cs8427_create(struct snd_i2c_bus *bus,
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struct snd_i2c_device *device;
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unsigned char buf[24];
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if ((err = snd_i2c_device_create(bus, "CS8427", CS8427_ADDR | (addr & 7),
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if ((err = snd_i2c_device_create(bus, "CS8427",
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CS8427_ADDR | (addr & 7),
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&device)) < 0)
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return err;
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chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL);
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@ -212,8 +227,8 @@ int snd_cs8427_create(struct snd_i2c_bus *bus,
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device->private_free = snd_cs8427_free;
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snd_i2c_lock(bus);
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if ((err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER)) !=
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CS8427_VER8427A) {
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err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
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if (err != CS8427_VER8427A) {
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snd_i2c_unlock(bus);
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snd_printk(KERN_ERR "unable to find CS8427 signature "
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"(expected 0x%x, read 0x%x),\n",
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@ -222,7 +237,8 @@ int snd_cs8427_create(struct snd_i2c_bus *bus,
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return -EFAULT;
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}
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/* turn off run bit while making changes to configuration */
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if ((err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00)) < 0)
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err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00);
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if (err < 0)
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goto __fail;
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/* send initial values */
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memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
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@ -282,6 +298,8 @@ int snd_cs8427_create(struct snd_i2c_bus *bus,
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return err < 0 ? err : -EIO;
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}
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EXPORT_SYMBOL(snd_cs8427_create);
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/*
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* Reset the chip using run bit, also lock PLL using ILRCK and
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* put back AES3INPUT. This workaround is described in latest
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@ -296,7 +314,8 @@ static void snd_cs8427_reset(struct snd_i2c_device *cs8427)
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snd_assert(cs8427, return);
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chip = cs8427->private_data;
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snd_i2c_lock(cs8427->bus);
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if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) == CS8427_RXDAES3INPUT) /* AES3 bit is set */
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if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
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CS8427_RXDAES3INPUT) /* AES3 bit is set */
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aes3input = 1;
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chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
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snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
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@ -367,12 +386,15 @@ static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
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snd_i2c_lock(device->bus);
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if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) {
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snd_printk(KERN_ERR "unable to send register 0x%x byte to CS8427\n", reg);
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snd_printk(KERN_ERR "unable to send register 0x%x byte "
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"to CS8427\n", reg);
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snd_i2c_unlock(device->bus);
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return err < 0 ? err : -EIO;
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}
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if ((err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10)) != 10) {
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snd_printk(KERN_ERR "unable to read Q-subcode bytes from CS8427\n");
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err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10);
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if (err != 10) {
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snd_printk(KERN_ERR "unable to read Q-subcode bytes "
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"from CS8427\n");
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snd_i2c_unlock(device->bus);
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return err < 0 ? err : -EIO;
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}
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@ -380,7 +402,8 @@ static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
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return 0;
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}
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static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
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static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
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uinfo->count = 1;
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@ -413,7 +436,8 @@ static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol,
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snd_i2c_lock(device->bus);
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change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
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memcpy(status, ucontrol->value.iec958.status, 24);
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if (change && (kcontrol->private_value ? runtime != NULL : runtime == NULL)) {
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if (change && (kcontrol->private_value ?
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runtime != NULL : runtime == NULL)) {
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err = snd_cs8427_send_corudata(device, 0, status, 24);
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if (err < 0)
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change = err;
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@ -442,7 +466,8 @@ static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
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.iface = SNDRV_CTL_ELEM_IFACE_PCM,
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.info = snd_cs8427_in_status_info,
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.name = "IEC958 CS8427 Input Status",
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.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
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.access = (SNDRV_CTL_ELEM_ACCESS_READ |
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SNDRV_CTL_ELEM_ACCESS_VOLATILE),
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.get = snd_cs8427_in_status_get,
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.private_value = 15,
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},
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@ -450,7 +475,8 @@ static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
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.iface = SNDRV_CTL_ELEM_IFACE_PCM,
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.info = snd_cs8427_in_status_info,
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.name = "IEC958 CS8427 Error Status",
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.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
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.access = (SNDRV_CTL_ELEM_ACCESS_READ |
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SNDRV_CTL_ELEM_ACCESS_VOLATILE),
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.get = snd_cs8427_in_status_get,
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.private_value = 16,
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},
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@ -470,7 +496,8 @@ static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
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.private_value = 0
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},
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{
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.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
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.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
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SNDRV_CTL_ELEM_ACCESS_INACTIVE),
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.iface = SNDRV_CTL_ELEM_IFACE_PCM,
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.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
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.info = snd_cs8427_spdif_info,
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@ -482,7 +509,8 @@ static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
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.iface = SNDRV_CTL_ELEM_IFACE_PCM,
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.info = snd_cs8427_qsubcode_info,
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.name = "IEC958 Q-subcode Capture Default",
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.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
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.access = (SNDRV_CTL_ELEM_ACCESS_READ |
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SNDRV_CTL_ELEM_ACCESS_VOLATILE),
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.get = snd_cs8427_qsubcode_get
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}};
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@ -505,7 +533,8 @@ int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427,
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err = snd_ctl_add(cs8427->bus->card, kctl);
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if (err < 0)
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return err;
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if (!strcmp(kctl->id.name, SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
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if (! strcmp(kctl->id.name,
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SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
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chip->playback.pcm_ctl = kctl;
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}
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@ -515,6 +544,8 @@ int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427,
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return 0;
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}
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EXPORT_SYMBOL(snd_cs8427_iec958_build);
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int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active)
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{
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struct cs8427 *chip;
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@ -522,13 +553,17 @@ int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active)
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snd_assert(cs8427, return -ENXIO);
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chip = cs8427->private_data;
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if (active)
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memcpy(chip->playback.pcm_status, chip->playback.def_status, 24);
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memcpy(chip->playback.pcm_status,
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chip->playback.def_status, 24);
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chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
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snd_ctl_notify(cs8427->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
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SNDRV_CTL_EVENT_MASK_INFO, &chip->playback.pcm_ctl->id);
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snd_ctl_notify(cs8427->bus->card,
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SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
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&chip->playback.pcm_ctl->id);
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return 0;
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}
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EXPORT_SYMBOL(snd_cs8427_iec958_active);
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int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate)
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{
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struct cs8427 *chip;
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@ -568,6 +603,8 @@ int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate)
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return err < 0 ? err : 0;
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}
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EXPORT_SYMBOL(snd_cs8427_iec958_pcm);
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static int __init alsa_cs8427_module_init(void)
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{
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return 0;
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@ -579,9 +616,3 @@ static void __exit alsa_cs8427_module_exit(void)
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module_init(alsa_cs8427_module_init)
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module_exit(alsa_cs8427_module_exit)
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EXPORT_SYMBOL(snd_cs8427_create);
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EXPORT_SYMBOL(snd_cs8427_reg_write);
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EXPORT_SYMBOL(snd_cs8427_iec958_build);
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EXPORT_SYMBOL(snd_cs8427_iec958_active);
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EXPORT_SYMBOL(snd_cs8427_iec958_pcm);
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Block a user