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mfd: intel-lpss: Consistently use GENMASK()
Since we already are using BIT() macro, use GENMASK() as well for sake of consistency. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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@ -47,10 +47,10 @@
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#define LPSS_PRIV_IDLELTR 0x14
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#define LPSS_PRIV_IDLELTR 0x14
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#define LPSS_PRIV_LTR_REQ BIT(15)
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#define LPSS_PRIV_LTR_REQ BIT(15)
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#define LPSS_PRIV_LTR_SCALE_MASK 0xc00
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#define LPSS_PRIV_LTR_SCALE_MASK GENMASK(11, 10)
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#define LPSS_PRIV_LTR_SCALE_1US 0x800
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#define LPSS_PRIV_LTR_SCALE_1US (2 << 10)
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#define LPSS_PRIV_LTR_SCALE_32US 0xc00
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#define LPSS_PRIV_LTR_SCALE_32US (3 << 10)
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#define LPSS_PRIV_LTR_VALUE_MASK 0x3ff
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#define LPSS_PRIV_LTR_VALUE_MASK GENMASK(9, 0)
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#define LPSS_PRIV_SSP_REG 0x20
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#define LPSS_PRIV_SSP_REG 0x20
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#define LPSS_PRIV_SSP_REG_DIS_DMA_FIN BIT(0)
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#define LPSS_PRIV_SSP_REG_DIS_DMA_FIN BIT(0)
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@ -59,8 +59,8 @@
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#define LPSS_PRIV_CAPS 0xfc
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#define LPSS_PRIV_CAPS 0xfc
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#define LPSS_PRIV_CAPS_NO_IDMA BIT(8)
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#define LPSS_PRIV_CAPS_NO_IDMA BIT(8)
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#define LPSS_PRIV_CAPS_TYPE_MASK GENMASK(7, 4)
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#define LPSS_PRIV_CAPS_TYPE_SHIFT 4
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#define LPSS_PRIV_CAPS_TYPE_SHIFT 4
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#define LPSS_PRIV_CAPS_TYPE_MASK (0xf << LPSS_PRIV_CAPS_TYPE_SHIFT)
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/* This matches the type field in CAPS register */
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/* This matches the type field in CAPS register */
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enum intel_lpss_dev_type {
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enum intel_lpss_dev_type {
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