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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 00:51:02 +07:00
MIPS: Alchemy: Add basic support for the GPR board
From: Wolfgang Grandegger <wg@denx.de> Add basic support for the General Purpose Router (GPR) board from Trapeze ITS. Signed-off-by: Wolfgang Grandegger <wg@denx.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1460/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -128,6 +128,15 @@ config MIPS_XXS1500
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select SYS_SUPPORTS_LITTLE_ENDIAN
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select SYS_HAS_EARLY_PRINTK
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config MIPS_GPR
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bool "Trapeze ITS GPR board"
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select SOC_AU1550
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select HW_HAS_PCI
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select DMA_NONCOHERENT
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select MIPS_DISABLE_OBSOLETE_IDE
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select SYS_SUPPORTS_LITTLE_ENDIAN
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select SYS_HAS_EARLY_PRINTK
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endchoice
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config SOC_AU1000
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@ -100,6 +100,11 @@ load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
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platform-$(CONFIG_MIPS_XXS1500) += alchemy/xxs1500/
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load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
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#
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# Trapeze ITS GRP board
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#
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platform-$(CONFIG_MIPS_GPR) += alchemy/gpr/
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load-$(CONFIG_MIPS_GPR) += 0xffffffff80100000
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# boards can specify their own <gpio.h> in one of their include dirs.
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# If they do, placing this line here at the end will make sure the
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8
arch/mips/alchemy/gpr/Makefile
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8
arch/mips/alchemy/gpr/Makefile
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@ -0,0 +1,8 @@
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#
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# Copyright 2003 MontaVista Software Inc.
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# Author: MontaVista Software, Inc. <source@mvista.com>
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#
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# Makefile for Trapeze ITS GPR board.
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#
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obj-y += board_setup.o init.o platform.o
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93
arch/mips/alchemy/gpr/board_setup.c
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93
arch/mips/alchemy/gpr/board_setup.c
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@ -0,0 +1,93 @@
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/*
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* Copyright 2010 Wolfgang Grandegger <wg@denx.de>
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*
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* Copyright 2000-2003, 2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <asm/reboot.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <prom.h>
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#define UART1_ADDR KSEG1ADDR(UART1_PHYS_ADDR)
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#define UART3_ADDR KSEG1ADDR(UART3_PHYS_ADDR)
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char irq_tab_alchemy[][5] __initdata = {
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[0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff },
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};
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static void gpr_reset(char *c)
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{
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/* switch System-LED to orange (red# and green# on) */
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alchemy_gpio_direction_output(4, 0);
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alchemy_gpio_direction_output(5, 0);
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/* trigger watchdog to reset board in 200ms */
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printk(KERN_EMERG "Triggering watchdog soft reset...\n");
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raw_local_irq_disable();
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alchemy_gpio_direction_output(1, 0);
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udelay(1);
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alchemy_gpio_set_value(1, 1);
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while (1)
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cpu_wait();
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}
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static void gpr_power_off(void)
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{
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while (1)
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cpu_wait();
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}
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void __init board_setup(void)
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{
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printk(KERN_INFO "Tarpeze ITS GPR board\n");
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pm_power_off = gpr_power_off;
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_machine_halt = gpr_power_off;
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_machine_restart = gpr_reset;
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/* Enable UART3 */
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au_writel(0x1, UART3_ADDR + UART_MOD_CNTRL);/* clock enable (CE) */
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au_writel(0x3, UART3_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
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/* Enable UART1 */
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au_writel(0x1, UART1_ADDR + UART_MOD_CNTRL); /* clock enable (CE) */
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au_writel(0x3, UART1_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
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/* Take away Reset of UMTS-card */
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alchemy_gpio_direction_output(215, 1);
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#ifdef CONFIG_PCI
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#if defined(__MIPSEB__)
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au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
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#else
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au_writel(0xf, Au1500_PCI_CFG);
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#endif
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#endif
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}
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63
arch/mips/alchemy/gpr/init.c
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63
arch/mips/alchemy/gpr/init.c
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@ -0,0 +1,63 @@
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/*
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* Copyright 2010 Wolfgang Grandegger <wg@denx.de>
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*
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* Copyright 2003, 2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <asm/bootinfo.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <prom.h>
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const char *get_system_type(void)
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{
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return "GPR";
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}
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void __init prom_init(void)
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{
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unsigned char *memsize_str;
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unsigned long memsize;
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prom_argc = fw_arg0;
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prom_argv = (char **)fw_arg1;
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prom_envp = (char **)fw_arg2;
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prom_init_cmdline();
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memsize_str = prom_getenv("memsize");
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if (!memsize_str)
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memsize = 0x04000000;
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else
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strict_strtoul(memsize_str, 0, &memsize);
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add_memory_region(0, memsize, BOOT_MEM_RAM);
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}
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void prom_putchar(unsigned char c)
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{
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alchemy_uart_putchar(UART0_PHYS_ADDR, c);
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}
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183
arch/mips/alchemy/gpr/platform.c
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183
arch/mips/alchemy/gpr/platform.c
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@ -0,0 +1,183 @@
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/*
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* GPR board platform device registration
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*
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* Copyright (C) 2010 Wolfgang Grandegger <wg@denx.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <linux/leds.h>
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/i2c-gpio.h>
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#include <asm/mach-au1x00/au1000.h>
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/*
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* Watchdog
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*/
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static struct resource gpr_wdt_resource[] = {
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[0] = {
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.start = 1,
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.end = 1,
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.name = "gpr-adm6320-wdt",
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device gpr_wdt_device = {
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.name = "adm6320-wdt",
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.id = 0,
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.num_resources = ARRAY_SIZE(gpr_wdt_resource),
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.resource = gpr_wdt_resource,
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};
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/*
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* FLASH
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*
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* 0x00000000-0x00200000 : "kernel"
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* 0x00200000-0x00a00000 : "rootfs"
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* 0x01d00000-0x01f00000 : "config"
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* 0x01c00000-0x01d00000 : "yamon"
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* 0x01d00000-0x01d40000 : "yamon env vars"
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* 0x00000000-0x00a00000 : "kernel+rootfs"
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*/
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static struct mtd_partition gpr_mtd_partitions[] = {
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{
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.name = "kernel",
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.size = 0x00200000,
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.offset = 0,
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},
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{
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.name = "rootfs",
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.size = 0x00800000,
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "config",
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.size = 0x00200000,
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.offset = 0x01d00000,
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},
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{
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.name = "yamon",
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.size = 0x00100000,
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.offset = 0x01c00000,
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},
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{
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.name = "yamon env vars",
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.size = 0x00040000,
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.offset = MTDPART_OFS_APPEND,
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},
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{
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.name = "kernel+rootfs",
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.size = 0x00a00000,
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.offset = 0,
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},
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};
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static struct physmap_flash_data gpr_flash_data = {
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.width = 4,
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.nr_parts = ARRAY_SIZE(gpr_mtd_partitions),
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.parts = gpr_mtd_partitions,
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};
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static struct resource gpr_mtd_resource = {
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.start = 0x1e000000,
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.end = 0x1fffffff,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device gpr_mtd_device = {
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.name = "physmap-flash",
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.dev = {
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.platform_data = &gpr_flash_data,
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},
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.num_resources = 1,
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.resource = &gpr_mtd_resource,
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};
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/*
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* LEDs
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*/
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static struct gpio_led gpr_gpio_leds[] = {
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{ /* green */
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.name = "gpr:green",
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.gpio = 4,
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.active_low = 1,
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},
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{ /* red */
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.name = "gpr:red",
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.gpio = 5,
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.active_low = 1,
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}
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};
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static struct gpio_led_platform_data gpr_led_data = {
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.num_leds = ARRAY_SIZE(gpr_gpio_leds),
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.leds = gpr_gpio_leds,
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};
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static struct platform_device gpr_led_devices = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &gpr_led_data,
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}
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};
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/*
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* I2C
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*/
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static struct i2c_gpio_platform_data gpr_i2c_data = {
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.sda_pin = 209,
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.sda_is_open_drain = 1,
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.scl_pin = 210,
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.scl_is_open_drain = 1,
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.udelay = 2, /* ~100 kHz */
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.timeout = HZ,
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};
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static struct platform_device gpr_i2c_device = {
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.name = "i2c-gpio",
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.id = -1,
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.dev.platform_data = &gpr_i2c_data,
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};
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static struct i2c_board_info gpr_i2c_info[] __initdata = {
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{
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I2C_BOARD_INFO("lm83", 0x18),
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.type = "lm83"
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}
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};
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static struct platform_device *gpr_devices[] __initdata = {
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&gpr_wdt_device,
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&gpr_mtd_device,
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&gpr_i2c_device,
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&gpr_led_devices,
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};
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static int __init gpr_dev_init(void)
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{
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i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info));
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return platform_add_devices(gpr_devices, ARRAY_SIZE(gpr_devices));
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}
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device_initcall(gpr_dev_init);
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2060
arch/mips/configs/gpr_defconfig
Normal file
2060
arch/mips/configs/gpr_defconfig
Normal file
File diff suppressed because it is too large
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