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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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arm64: dts: apm: Use lowercase consistently for hex constants
The convention in these files is to use lowercase for "0x" prefixes and for the hex constants themselves, but a few changes didn't follow that convention, which makes the file annoying to read. Use lowercase consistently for the hex constants. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Duc Dang <dhdang@apm.com>
This commit is contained in:
Bjorn Helgaas
Duc Dang
parent
1a695a905c
commit
cafc4cd0c8
@ -59,8 +59,8 @@ Example:
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compatible = "apm,xgene-enet";
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status = "disabled";
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reg = <0x0 0x17020000 0x0 0xd100>,
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<0x0 0X17030000 0x0 0X400>,
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<0x0 0X10000000 0x0 0X200>;
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<0x0 0x17030000 0x0 0x400>,
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<0x0 0x10000000 0x0 0x200>;
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reg-names = "enet_csr", "ring_csr", "ring_cmd";
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interrupts = <0x0 0x3c 0x4>;
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port-id = <0>;
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@ -106,9 +106,9 @@ gic: interrupt-controller@78090000 {
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interrupts = <1 9 0xf04>; /* GIC Maintenence IRQ */
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ranges = <0 0 0 0x79000000 0x0 0x800000>; /* MSI Range */
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reg = <0x0 0x78090000 0x0 0x10000>, /* GIC Dist */
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<0x0 0x780A0000 0x0 0x20000>, /* GIC CPU */
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<0x0 0x780C0000 0x0 0x10000>, /* GIC VCPU Control */
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<0x0 0x780E0000 0x0 0x20000>; /* GIC VCPU */
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<0x0 0x780a0000 0x0 0x20000>, /* GIC CPU */
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<0x0 0x780c0000 0x0 0x10000>, /* GIC VCPU Control */
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<0x0 0x780e0000 0x0 0x20000>; /* GIC VCPU */
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v2m0: v2m@0x00000 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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@ -159,35 +159,35 @@ v2m9: v2m@0x90000 {
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msi-controller;
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reg = <0x0 0x90000 0x0 0x1000>;
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};
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v2m10: v2m@0xA0000 {
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v2m10: v2m@0xa0000 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0x0 0xA0000 0x0 0x1000>;
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reg = <0x0 0xa0000 0x0 0x1000>;
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};
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v2m11: v2m@0xB0000 {
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v2m11: v2m@0xb0000 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0x0 0xB0000 0x0 0x1000>;
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reg = <0x0 0xb0000 0x0 0x1000>;
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};
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v2m12: v2m@0xC0000 {
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v2m12: v2m@0xc0000 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0x0 0xC0000 0x0 0x1000>;
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reg = <0x0 0xc0000 0x0 0x1000>;
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};
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v2m13: v2m@0xD0000 {
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v2m13: v2m@0xd0000 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0x0 0xD0000 0x0 0x1000>;
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reg = <0x0 0xd0000 0x0 0x1000>;
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};
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v2m14: v2m@0xE0000 {
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v2m14: v2m@0xe0000 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0x0 0xE0000 0x0 0x1000>;
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reg = <0x0 0xe0000 0x0 0x1000>;
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};
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v2m15: v2m@0xF0000 {
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v2m15: v2m@0xf0000 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0x0 0xF0000 0x0 0x1000>;
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reg = <0x0 0xf0000 0x0 0x1000>;
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};
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};
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@ -629,8 +629,8 @@ sgenet0: ethernet@1f610000 {
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compatible = "apm,xgene2-sgenet";
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status = "disabled";
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reg = <0x0 0x1f610000 0x0 0x10000>,
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<0x0 0x1f600000 0x0 0Xd100>,
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<0x0 0x20000000 0x0 0X20000>;
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<0x0 0x1f600000 0x0 0xd100>,
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<0x0 0x20000000 0x0 0x20000>;
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interrupts = <0 96 4>,
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<0 97 4>;
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dma-coherent;
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@ -643,8 +643,8 @@ xgenet1: ethernet@1f620000 {
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compatible = "apm,xgene2-xgenet";
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status = "disabled";
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reg = <0x0 0x1f620000 0x0 0x10000>,
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<0x0 0x1f600000 0x0 0Xd100>,
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<0x0 0x20000000 0x0 0X220000>;
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<0x0 0x1f600000 0x0 0xd100>,
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<0x0 0x20000000 0x0 0x220000>;
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interrupts = <0 108 4>,
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<0 109 4>,
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<0 110 4>,
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@ -684,7 +684,7 @@ i2c4: i2c@10640000 {
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#size-cells = <0>;
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compatible = "snps,designware-i2c";
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reg = <0x0 0x10640000 0x0 0x1000>;
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interrupts = <0 0x3A 0x4>;
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interrupts = <0 0x3a 0x4>;
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clocks = <&i2c4clk 0>;
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bus_num = <4>;
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};
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@ -204,7 +204,7 @@ qmlclk: qmlclk {
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#clock-cells = <1>;
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clocks = <&socplldiv2 0>;
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clock-names = "qmlclk";
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reg = <0x0 0x1703C000 0x0 0x1000>;
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reg = <0x0 0x1703c000 0x0 0x1000>;
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reg-names = "csr-reg";
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clock-output-names = "qmlclk";
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};
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@ -226,7 +226,7 @@ menetclk: menetclk {
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compatible = "apm,xgene-device-clock";
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#clock-cells = <1>;
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clocks = <ðclk 0>;
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reg = <0x0 0x1702C000 0x0 0x1000>;
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reg = <0x0 0x1702c000 0x0 0x1000>;
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reg-names = "csr-reg";
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clock-output-names = "menetclk";
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};
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@ -925,8 +925,8 @@ menet: ethernet@17020000 {
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compatible = "apm,xgene-enet";
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status = "disabled";
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reg = <0x0 0x17020000 0x0 0xd100>,
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<0x0 0X17030000 0x0 0Xc300>,
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<0x0 0X10000000 0x0 0X200>;
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<0x0 0x17030000 0x0 0xc300>,
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<0x0 0x10000000 0x0 0x200>;
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reg-names = "enet_csr", "ring_csr", "ring_cmd";
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interrupts = <0x0 0x3c 0x4>;
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dma-coherent;
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@ -951,11 +951,11 @@ sgenet0: ethernet@1f210000 {
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compatible = "apm,xgene1-sgenet";
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status = "disabled";
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reg = <0x0 0x1f210000 0x0 0xd100>,
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<0x0 0x1f200000 0x0 0Xc300>,
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<0x0 0x1B000000 0x0 0X200>;
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<0x0 0x1f200000 0x0 0xc300>,
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<0x0 0x1b000000 0x0 0x200>;
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reg-names = "enet_csr", "ring_csr", "ring_cmd";
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interrupts = <0x0 0xA0 0x4>,
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<0x0 0xA1 0x4>;
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interrupts = <0x0 0xa0 0x4>,
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<0x0 0xa1 0x4>;
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dma-coherent;
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clocks = <&sge0clk 0>;
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local-mac-address = [00 00 00 00 00 00];
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@ -966,11 +966,11 @@ sgenet1: ethernet@1f210030 {
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compatible = "apm,xgene1-sgenet";
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status = "disabled";
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reg = <0x0 0x1f210030 0x0 0xd100>,
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<0x0 0x1f200000 0x0 0Xc300>,
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<0x0 0x1B000000 0x0 0X8000>;
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<0x0 0x1f200000 0x0 0xc300>,
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<0x0 0x1b000000 0x0 0x8000>;
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reg-names = "enet_csr", "ring_csr", "ring_cmd";
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interrupts = <0x0 0xAC 0x4>,
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<0x0 0xAD 0x4>;
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interrupts = <0x0 0xac 0x4>,
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<0x0 0xad 0x4>;
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port-id = <1>;
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dma-coherent;
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clocks = <&sge1clk 0>;
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@ -982,8 +982,8 @@ xgenet: ethernet@1f610000 {
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compatible = "apm,xgene1-xgenet";
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status = "disabled";
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reg = <0x0 0x1f610000 0x0 0xd100>,
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<0x0 0x1f600000 0x0 0Xc300>,
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<0x0 0x18000000 0x0 0X200>;
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<0x0 0x1f600000 0x0 0xc300>,
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<0x0 0x18000000 0x0 0x200>;
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reg-names = "enet_csr", "ring_csr", "ring_cmd";
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interrupts = <0x0 0x60 0x4>,
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<0x0 0x61 0x4>,
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@ -1005,11 +1005,11 @@ xgenet1: ethernet@1f620000 {
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compatible = "apm,xgene1-xgenet";
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status = "disabled";
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reg = <0x0 0x1f620000 0x0 0xd100>,
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<0x0 0x1f600000 0x0 0Xc300>,
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<0x0 0x18000000 0x0 0X8000>;
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<0x0 0x1f600000 0x0 0xc300>,
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<0x0 0x18000000 0x0 0x8000>;
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reg-names = "enet_csr", "ring_csr", "ring_cmd";
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interrupts = <0x0 0x6C 0x4>,
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<0x0 0x6D 0x4>;
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interrupts = <0x0 0x6c 0x4>,
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<0x0 0x6d 0x4>;
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port-id = <1>;
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dma-coherent;
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clocks = <&xge1clk 0>;
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