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RDMA/hns: Add vlan enable bit for hip08
In order to extend vlan device range, the design add two field of qp context for checking vlan packet in sender and in recevicer. Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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@ -3608,6 +3608,17 @@ static int hns_roce_v2_modify_qp(struct ib_qp *ibqp,
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memcpy(src_mac, gid_attr->ndev->dev_addr, ETH_ALEN);
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}
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if (is_vlan_dev(gid_attr->ndev)) {
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roce_set_bit(context->byte_76_srqn_op_en,
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V2_QPC_BYTE_76_RQ_VLAN_EN_S, 1);
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roce_set_bit(qpc_mask->byte_76_srqn_op_en,
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V2_QPC_BYTE_76_RQ_VLAN_EN_S, 0);
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roce_set_bit(context->byte_168_irrl_idx,
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V2_QPC_BYTE_168_SQ_VLAN_EN_S, 1);
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roce_set_bit(qpc_mask->byte_168_irrl_idx,
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V2_QPC_BYTE_168_SQ_VLAN_EN_S, 0);
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}
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roce_set_field(context->byte_24_mtu_tc,
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V2_QPC_BYTE_24_VLAN_ID_M,
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V2_QPC_BYTE_24_VLAN_ID_S, vlan);
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@ -527,6 +527,7 @@ struct hns_roce_v2_qp_context {
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#define V2_QPC_BYTE_76_RQIE_S 28
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#define V2_QPC_BYTE_76_RQ_VLAN_EN_S 30
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#define V2_QPC_BYTE_80_RX_CQN_S 0
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#define V2_QPC_BYTE_80_RX_CQN_M GENMASK(23, 0)
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@ -628,6 +629,7 @@ struct hns_roce_v2_qp_context {
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#define V2_QPC_BYTE_168_LP_SGEN_INI_S 22
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#define V2_QPC_BYTE_168_LP_SGEN_INI_M GENMASK(23, 22)
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#define V2_QPC_BYTE_168_SQ_VLAN_EN_S 24
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#define V2_QPC_BYTE_168_POLL_DB_WAIT_DO_S 25
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#define V2_QPC_BYTE_168_SCC_TOKEN_FORBID_SQ_DEQ_S 26
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#define V2_QPC_BYTE_168_WAIT_ACK_TIMEOUT_S 27
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