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drm/i915: split up fdi_set_m_n into computation and hw setup

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And also move the computed m_n values into the pipe_config. This is a
prep step to move the fdi state computation completely into the
prepare phase of the modeset sequence. Which will allow us to handle
fdi link bw constraints in a better way.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Daniel Vetter 2013-02-14 16:54:22 +01:00
parent 627eb5a318
commit ca3a0ff80f
2 changed files with 17 additions and 12 deletions
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26
drivers/gpu/drm/i915/intel_display.c
View File

@ -5499,13 +5499,11 @@ void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
}
}
static void ironlake_fdi_set_m_n(struct drm_crtc *crtc)
static void ironlake_fdi_compute_config(struct intel_crtc *intel_crtc)
{
struct drm_device *dev = crtc->dev;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct drm_device *dev = intel_crtc->base.dev;
struct drm_display_mode *adjusted_mode =
&intel_crtc->config.adjusted_mode;
struct intel_link_m_n m_n = {0};
int target_clock, lane, link_bw;
/* FDI is a binary signal running at ~2.7GHz, encoding
@ -5530,9 +5528,7 @@ static void ironlake_fdi_set_m_n(struct drm_crtc *crtc)
if (intel_crtc->config.pixel_multiplier > 1)
link_bw *= intel_crtc->config.pixel_multiplier;
intel_link_compute_m_n(intel_crtc->config.pipe_bpp, lane, target_clock,
link_bw, &m_n);
intel_cpu_transcoder_set_m_n(intel_crtc, &m_n);
link_bw, &intel_crtc->config.fdi_m_n);
}
static bool ironlake_needs_fb_cb_tune(struct dpll *dpll, int factor)
@ -5753,8 +5749,12 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
/* Note, this also computes intel_crtc->fdi_lanes which is used below in
* ironlake_check_fdi_lanes. */
intel_crtc->config.fdi_lanes = 0;
if (intel_crtc->config.has_pch_encoder)
ironlake_fdi_set_m_n(crtc);
if (intel_crtc->config.has_pch_encoder) {
ironlake_fdi_compute_config(intel_crtc);
intel_cpu_transcoder_set_m_n(intel_crtc,
&intel_crtc->config.fdi_m_n);
}
fdi_config_ok = ironlake_check_fdi_lanes(intel_crtc);
@ -5884,8 +5884,12 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
intel_set_pipe_timings(intel_crtc, mode, adjusted_mode);
if (intel_crtc->config.has_pch_encoder)
ironlake_fdi_set_m_n(crtc);
if (intel_crtc->config.has_pch_encoder) {
ironlake_fdi_compute_config(intel_crtc);
intel_cpu_transcoder_set_m_n(intel_crtc,
&intel_crtc->config.fdi_m_n);
}
haswell_set_pipeconf(crtc);

3
drivers/gpu/drm/i915/intel_drv.h
View File

@ -250,8 +250,9 @@ struct intel_crtc_config {
u32 size;
} pch_pfit;
/* FDI lanes used, only valid if has_pch_encoder is set. */
/* FDI configuration, only valid if has_pch_encoder is set. */
int fdi_lanes;
struct intel_link_m_n fdi_m_n;
};
struct intel_crtc {