mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 07:56:44 +07:00
drm/i915: Only include active engines in the capture state
Skip printing out idle engines that did not contribute to the GPU hang. As the number of engines gets ever larger, we have increasing noise in the error state where typically there is only one guilty request on one engine that we need to inspect. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190808144511.32269-1-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson
parent
c7302f2044
commit
c990b4c359
@ -49,27 +49,6 @@
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#define ALLOW_FAIL (GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)
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#define ATOMIC_MAYFAIL (GFP_ATOMIC | __GFP_NOWARN)
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static inline const struct intel_engine_cs *
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engine_lookup(const struct drm_i915_private *i915, unsigned int id)
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{
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if (id >= I915_NUM_ENGINES)
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return NULL;
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return i915->engine[id];
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}
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static inline const char *
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__engine_name(const struct intel_engine_cs *engine)
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{
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return engine ? engine->name : "";
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}
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static const char *
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engine_name(const struct drm_i915_private *i915, unsigned int id)
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{
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return __engine_name(engine_lookup(i915, id));
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}
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static void __sg_set_buf(struct scatterlist *sg,
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void *addr, unsigned int len, loff_t it)
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{
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@ -447,7 +426,7 @@ static void error_print_instdone(struct drm_i915_error_state_buf *m,
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err_printf(m, " INSTDONE: 0x%08x\n",
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ee->instdone.instdone);
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if (ee->engine_id != RCS0 || INTEL_GEN(m->i915) <= 3)
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if (ee->engine->class != RENDER_CLASS || INTEL_GEN(m->i915) <= 3)
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return;
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err_printf(m, " SC_INSTDONE: 0x%08x\n",
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@ -501,8 +480,7 @@ static void error_print_engine(struct drm_i915_error_state_buf *m,
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{
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int n;
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err_printf(m, "%s command stream:\n",
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engine_name(m->i915, ee->engine_id));
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err_printf(m, "%s command stream:\n", ee->engine->name);
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err_printf(m, " IDLE?: %s\n", yesno(ee->idle));
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err_printf(m, " START: 0x%08x\n", ee->start);
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err_printf(m, " HEAD: 0x%08x [0x%08x]\n", ee->head, ee->rq_head);
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@ -578,9 +556,9 @@ void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...)
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}
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static void print_error_obj(struct drm_i915_error_state_buf *m,
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struct intel_engine_cs *engine,
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const struct intel_engine_cs *engine,
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const char *name,
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struct drm_i915_error_object *obj)
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const struct drm_i915_error_object *obj)
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{
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char out[ASCII85_BUFSZ];
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int page;
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@ -677,7 +655,7 @@ static void err_free_sgl(struct scatterlist *sgl)
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static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
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struct i915_gpu_state *error)
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{
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struct drm_i915_error_object *obj;
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const struct drm_i915_error_engine *ee;
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struct timespec64 ts;
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int i, j;
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@ -702,15 +680,12 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
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jiffies_to_msecs(jiffies - error->capture),
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jiffies_to_msecs(error->capture - error->epoch));
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for (i = 0; i < ARRAY_SIZE(error->engine); i++) {
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if (!error->engine[i].context.pid)
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continue;
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for (ee = error->engine; ee; ee = ee->next)
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err_printf(m, "Active process (on ring %s): %s [%d]\n",
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engine_name(m->i915, i),
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error->engine[i].context.comm,
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error->engine[i].context.pid);
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}
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ee->engine->name,
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ee->context.comm,
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ee->context.pid);
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err_printf(m, "Reset count: %u\n", error->reset_count);
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err_printf(m, "Suspend count: %u\n", error->suspend_count);
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err_printf(m, "Platform: %s\n", intel_platform_name(error->device_info.platform));
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@ -758,17 +733,15 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
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if (IS_GEN(m->i915, 7))
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err_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
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for (i = 0; i < ARRAY_SIZE(error->engine); i++) {
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if (error->engine[i].engine_id != -1)
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error_print_engine(m, &error->engine[i], error->epoch);
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}
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for (ee = error->engine; ee; ee = ee->next)
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error_print_engine(m, ee, error->epoch);
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for (i = 0; i < ARRAY_SIZE(error->engine); i++) {
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const struct drm_i915_error_engine *ee = &error->engine[i];
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for (ee = error->engine; ee; ee = ee->next) {
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const struct drm_i915_error_object *obj;
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obj = ee->batchbuffer;
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if (obj) {
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err_puts(m, m->i915->engine[i]->name);
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err_puts(m, ee->engine->name);
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if (ee->context.pid)
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err_printf(m, " (submitted by %s [%d])",
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ee->context.comm,
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@ -776,16 +749,15 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
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err_printf(m, " --- gtt_offset = 0x%08x %08x\n",
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upper_32_bits(obj->gtt_offset),
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lower_32_bits(obj->gtt_offset));
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print_error_obj(m, m->i915->engine[i], NULL, obj);
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print_error_obj(m, ee->engine, NULL, obj);
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}
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for (j = 0; j < ee->user_bo_count; j++)
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print_error_obj(m, m->i915->engine[i],
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"user", ee->user_bo[j]);
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print_error_obj(m, ee->engine, "user", ee->user_bo[j]);
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if (ee->num_requests) {
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err_printf(m, "%s --- %d requests\n",
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m->i915->engine[i]->name,
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ee->engine->name,
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ee->num_requests);
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for (j = 0; j < ee->num_requests; j++)
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error_print_request(m, " ",
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@ -793,22 +765,13 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m,
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error->epoch);
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}
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print_error_obj(m, m->i915->engine[i],
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"ringbuffer", ee->ringbuffer);
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print_error_obj(m, m->i915->engine[i],
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"HW Status", ee->hws_page);
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print_error_obj(m, m->i915->engine[i],
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"HW context", ee->ctx);
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print_error_obj(m, m->i915->engine[i],
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"WA context", ee->wa_ctx);
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print_error_obj(m, m->i915->engine[i],
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print_error_obj(m, ee->engine, "ringbuffer", ee->ringbuffer);
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print_error_obj(m, ee->engine, "HW Status", ee->hws_page);
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print_error_obj(m, ee->engine, "HW context", ee->ctx);
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print_error_obj(m, ee->engine, "WA context", ee->wa_ctx);
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print_error_obj(m, ee->engine,
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"WA batchbuffer", ee->wa_batchbuffer);
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print_error_obj(m, m->i915->engine[i],
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print_error_obj(m, ee->engine,
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"NULL context", ee->default_state);
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}
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@ -957,13 +920,15 @@ void __i915_gpu_state_free(struct kref *error_ref)
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{
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struct i915_gpu_state *error =
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container_of(error_ref, typeof(*error), ref);
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long i, j;
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long i;
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for (i = 0; i < ARRAY_SIZE(error->engine); i++) {
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struct drm_i915_error_engine *ee = &error->engine[i];
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while (error->engine) {
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struct drm_i915_error_engine *ee = error->engine;
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for (j = 0; j < ee->user_bo_count; j++)
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i915_error_object_free(ee->user_bo[j]);
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error->engine = ee->next;
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for (i = 0; i < ee->user_bo_count; i++)
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i915_error_object_free(ee->user_bo[i]);
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kfree(ee->user_bo);
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i915_error_object_free(ee->batchbuffer);
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@ -974,6 +939,7 @@ void __i915_gpu_state_free(struct kref *error_ref)
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i915_error_object_free(ee->wa_ctx);
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kfree(ee->requests);
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kfree(ee);
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}
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kfree(error->overlay);
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@ -1055,23 +1021,17 @@ i915_error_object_create(struct drm_i915_private *i915,
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*
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* It's only a small step better than a random number in its current form.
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*/
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static u32 i915_error_generate_code(struct i915_gpu_state *error,
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intel_engine_mask_t engine_mask)
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static u32 i915_error_generate_code(struct i915_gpu_state *error)
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{
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const struct drm_i915_error_engine *ee = error->engine;
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/*
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* IPEHR would be an ideal way to detect errors, as it's the gross
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* measure of "the command that hung." However, has some very common
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* synchronization commands which almost always appear in the case
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* strictly a client bug. Use instdone to differentiate those some.
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*/
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if (engine_mask) {
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struct drm_i915_error_engine *ee =
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&error->engine[ffs(engine_mask)];
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return ee->ipehr ^ ee->instdone.instdone;
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}
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return 0;
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return ee ? ee->ipehr ^ ee->instdone.instdone : 0;
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}
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static void gem_record_fences(struct i915_gpu_state *error)
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@ -1284,9 +1244,11 @@ static void error_record_engine_execlists(const struct intel_engine_cs *engine,
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ee->num_ports = n;
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}
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static void record_context(struct drm_i915_error_context *e,
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struct i915_gem_context *ctx)
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static bool record_context(struct drm_i915_error_context *e,
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const struct i915_request *rq)
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{
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const struct i915_gem_context *ctx = rq->gem_context;
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if (ctx->pid) {
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struct task_struct *task;
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@ -1303,6 +1265,8 @@ static void record_context(struct drm_i915_error_context *e,
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e->sched_attr = ctx->sched;
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e->guilty = atomic_read(&ctx->guilty_count);
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e->active = atomic_read(&ctx->active_count);
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return i915_gem_context_no_error_capture(ctx);
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}
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struct capture_vma {
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@ -1397,74 +1361,67 @@ static void
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gem_record_rings(struct i915_gpu_state *error, struct compress *compress)
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{
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struct drm_i915_private *i915 = error->i915;
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int i;
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struct intel_engine_cs *engine;
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struct drm_i915_error_engine *ee;
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for (i = 0; i < I915_NUM_ENGINES; i++) {
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struct intel_engine_cs *engine = i915->engine[i];
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struct drm_i915_error_engine *ee = &error->engine[i];
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ee = kzalloc(sizeof(*ee), GFP_KERNEL);
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if (!ee)
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return;
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for_each_uabi_engine(engine, i915) {
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struct capture_vma *capture = NULL;
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struct i915_request *request;
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unsigned long flags;
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ee->engine_id = -1;
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if (!engine)
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continue;
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ee->engine_id = i;
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/* Refill our page pool before entering atomic section */
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pool_refill(&compress->pool, ALLOW_FAIL);
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error_record_engine_registers(error, engine, ee);
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error_record_engine_execlists(engine, ee);
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spin_lock_irqsave(&engine->active.lock, flags);
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request = intel_engine_find_active_request(engine);
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if (request) {
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struct i915_gem_context *ctx = request->gem_context;
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struct intel_ring *ring = request->ring;
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record_context(&ee->context, ctx);
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/*
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* We need to copy these to an anonymous buffer
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* as the simplest method to avoid being overwritten
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* by userspace.
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*/
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capture = capture_vma(capture,
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request->batch,
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&ee->batchbuffer);
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if (HAS_BROKEN_CS_TLB(i915))
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capture = capture_vma(capture,
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engine->gt->scratch,
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&ee->wa_batchbuffer);
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capture = request_record_user_bo(request, ee, capture);
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capture = capture_vma(capture,
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request->hw_context->state,
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&ee->ctx);
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capture = capture_vma(capture,
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ring->vma,
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&ee->ringbuffer);
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error->simulated |=
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i915_gem_context_no_error_capture(ctx);
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ee->rq_head = request->head;
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ee->rq_post = request->postfix;
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ee->rq_tail = request->tail;
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ee->cpu_ring_head = ring->head;
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ee->cpu_ring_tail = ring->tail;
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engine_record_requests(engine, request, ee);
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if (!request) {
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spin_unlock_irqrestore(&engine->active.lock, flags);
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continue;
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}
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error->simulated |= record_context(&ee->context, request);
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/*
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* We need to copy these to an anonymous buffer
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* as the simplest method to avoid being overwritten
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* by userspace.
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*/
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capture = capture_vma(capture,
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request->batch,
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&ee->batchbuffer);
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if (HAS_BROKEN_CS_TLB(i915))
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capture = capture_vma(capture,
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engine->gt->scratch,
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&ee->wa_batchbuffer);
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capture = request_record_user_bo(request, ee, capture);
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capture = capture_vma(capture,
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request->hw_context->state,
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&ee->ctx);
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capture = capture_vma(capture,
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request->ring->vma,
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&ee->ringbuffer);
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ee->cpu_ring_head = request->ring->head;
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ee->cpu_ring_tail = request->ring->tail;
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ee->rq_head = request->head;
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ee->rq_post = request->postfix;
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ee->rq_tail = request->tail;
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engine_record_requests(engine, request, ee);
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spin_unlock_irqrestore(&engine->active.lock, flags);
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error_record_engine_registers(error, engine, ee);
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error_record_engine_execlists(engine, ee);
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while (capture) {
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struct capture_vma *this = capture;
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struct i915_vma *vma = *this->slot;
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@ -1491,7 +1448,18 @@ gem_record_rings(struct i915_gpu_state *error, struct compress *compress)
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ee->default_state =
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capture_object(i915, engine->default_state, compress);
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ee->engine = engine;
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ee->next = error->engine;
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error->engine = ee;
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ee = kzalloc(sizeof(*ee), GFP_KERNEL);
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if (!ee)
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return;
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}
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kfree(ee);
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}
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static void
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@ -1627,24 +1595,18 @@ error_msg(struct i915_gpu_state *error,
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intel_engine_mask_t engines, const char *msg)
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{
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int len;
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int i;
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for (i = 0; i < ARRAY_SIZE(error->engine); i++)
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if (!error->engine[i].context.pid)
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engines &= ~BIT(i);
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len = scnprintf(error->error_msg, sizeof(error->error_msg),
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"GPU HANG: ecode %d:%x:0x%08x",
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INTEL_GEN(error->i915), engines,
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i915_error_generate_code(error, engines));
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if (engines) {
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i915_error_generate_code(error));
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if (error->engine) {
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/* Just show the first executing process, more is confusing */
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i = __ffs(engines);
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len += scnprintf(error->error_msg + len,
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sizeof(error->error_msg) - len,
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", in %s [%d]",
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error->engine[i].context.comm,
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error->engine[i].context.pid);
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error->engine->context.comm,
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error->engine->context.pid);
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}
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if (msg)
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len += scnprintf(error->error_msg + len,
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@ -1685,12 +1647,10 @@ static void capture_params(struct i915_gpu_state *error)
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static unsigned long capture_find_epoch(const struct i915_gpu_state *error)
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{
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const struct drm_i915_error_engine *ee;
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unsigned long epoch = error->capture;
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int i;
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for (i = 0; i < ARRAY_SIZE(error->engine); i++) {
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const struct drm_i915_error_engine *ee = &error->engine[i];
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for (ee = error->engine; ee; ee = ee->next) {
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if (ee->hangcheck_timestamp &&
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time_before(ee->hangcheck_timestamp, epoch))
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epoch = ee->hangcheck_timestamp;
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@ -81,7 +81,8 @@ struct i915_gpu_state {
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struct intel_display_error_state *display;
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struct drm_i915_error_engine {
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int engine_id;
|
||||
const struct intel_engine_cs *engine;
|
||||
|
||||
/* Software tracked state */
|
||||
bool idle;
|
||||
unsigned long hangcheck_timestamp;
|
||||
@ -158,7 +159,9 @@ struct i915_gpu_state {
|
||||
u32 pp_dir_base;
|
||||
};
|
||||
} vm_info;
|
||||
} engine[I915_NUM_ENGINES];
|
||||
|
||||
struct drm_i915_error_engine *next;
|
||||
} *engine;
|
||||
|
||||
struct scatterlist *sgl, *fit;
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user