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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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powerpc/powernv: Split ioda_eeh_get_state()
Function ioda_eeh_get_state() is used to fetch EEH state for PHB or PE. We're going to support compound PE and the function becomes more complicated with that. The patch splits the function into two functions for PHB and PE cases separately to improve readability. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Gavin Shan
Benjamin Herrenschmidt
parent
5ca27efbd8
commit
c979c70ed1
@ -251,6 +251,127 @@ static void ioda_eeh_phb_diag(struct eeh_pe *pe)
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__func__, pe->phb->global_number, rc);
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}
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static int ioda_eeh_get_phb_state(struct eeh_pe *pe)
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{
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struct pnv_phb *phb = pe->phb->private_data;
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u8 fstate;
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__be16 pcierr;
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s64 rc;
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int result = 0;
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rc = opal_pci_eeh_freeze_status(phb->opal_id,
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pe->addr,
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&fstate,
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&pcierr,
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NULL);
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if (rc != OPAL_SUCCESS) {
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pr_warn("%s: Failure %lld getting PHB#%x state\n",
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__func__, rc, phb->hose->global_number);
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return EEH_STATE_NOT_SUPPORT;
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}
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/*
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* Check PHB state. If the PHB is frozen for the
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* first time, to dump the PHB diag-data.
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*/
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if (be16_to_cpu(pcierr) != OPAL_EEH_PHB_ERROR) {
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result = (EEH_STATE_MMIO_ACTIVE |
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EEH_STATE_DMA_ACTIVE |
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EEH_STATE_MMIO_ENABLED |
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EEH_STATE_DMA_ENABLED);
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} else if (!(pe->state & EEH_PE_ISOLATED)) {
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eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
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ioda_eeh_phb_diag(pe);
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}
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return result;
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}
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static int ioda_eeh_get_pe_state(struct eeh_pe *pe)
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{
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struct pnv_phb *phb = pe->phb->private_data;
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u8 fstate;
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__be16 pcierr;
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s64 rc;
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int result;
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/*
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* We don't clobber hardware frozen state until PE
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* reset is completed. In order to keep EEH core
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* moving forward, we have to return operational
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* state during PE reset.
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*/
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if (pe->state & EEH_PE_RESET) {
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result = (EEH_STATE_MMIO_ACTIVE |
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EEH_STATE_DMA_ACTIVE |
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EEH_STATE_MMIO_ENABLED |
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EEH_STATE_DMA_ENABLED);
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return result;
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}
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/* Fetch state from hardware */
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rc = opal_pci_eeh_freeze_status(phb->opal_id,
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pe->addr,
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&fstate,
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&pcierr,
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NULL);
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if (rc != OPAL_SUCCESS) {
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pr_warn("%s: Failure %lld getting PHB#%x-PE%x state\n",
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__func__, rc, phb->hose->global_number, pe->addr);
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return EEH_STATE_NOT_SUPPORT;
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}
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/* Figure out state */
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switch (fstate) {
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case OPAL_EEH_STOPPED_NOT_FROZEN:
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result = (EEH_STATE_MMIO_ACTIVE |
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EEH_STATE_DMA_ACTIVE |
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EEH_STATE_MMIO_ENABLED |
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EEH_STATE_DMA_ENABLED);
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break;
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case OPAL_EEH_STOPPED_MMIO_FREEZE:
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result = (EEH_STATE_DMA_ACTIVE |
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EEH_STATE_DMA_ENABLED);
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break;
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case OPAL_EEH_STOPPED_DMA_FREEZE:
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result = (EEH_STATE_MMIO_ACTIVE |
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EEH_STATE_MMIO_ENABLED);
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break;
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case OPAL_EEH_STOPPED_MMIO_DMA_FREEZE:
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result = 0;
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break;
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case OPAL_EEH_STOPPED_RESET:
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result = EEH_STATE_RESET_ACTIVE;
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break;
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case OPAL_EEH_STOPPED_TEMP_UNAVAIL:
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result = EEH_STATE_UNAVAILABLE;
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break;
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case OPAL_EEH_STOPPED_PERM_UNAVAIL:
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result = EEH_STATE_NOT_SUPPORT;
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break;
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default:
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result = EEH_STATE_NOT_SUPPORT;
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pr_warn("%s: Invalid PHB#%x-PE#%x state %x\n",
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__func__, phb->hose->global_number,
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pe->addr, fstate);
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}
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/*
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* If the PE is switching to frozen state for the
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* first time, to dump the PHB diag-data.
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*/
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if (!(result & EEH_STATE_NOT_SUPPORT) &&
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!(result & EEH_STATE_UNAVAILABLE) &&
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!(result & EEH_STATE_MMIO_ACTIVE) &&
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!(result & EEH_STATE_DMA_ACTIVE) &&
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!(pe->state & EEH_PE_ISOLATED)) {
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eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
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ioda_eeh_phb_diag(pe);
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}
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return result;
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}
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/**
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* ioda_eeh_get_state - Retrieve the state of PE
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* @pe: EEH PE
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@ -261,118 +382,21 @@ static void ioda_eeh_phb_diag(struct eeh_pe *pe)
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*/
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static int ioda_eeh_get_state(struct eeh_pe *pe)
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{
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s64 ret = 0;
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u8 fstate;
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__be16 pcierr;
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u32 pe_no;
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int result;
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struct pci_controller *hose = pe->phb;
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struct pnv_phb *phb = hose->private_data;
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struct pnv_phb *phb = pe->phb->private_data;
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/*
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* Sanity check on PE address. The PHB PE address should
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* be zero.
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*/
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if (pe->addr < 0 || pe->addr >= phb->ioda.total_pe) {
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pr_err("%s: PE address %x out of range [0, %x] "
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"on PHB#%x\n",
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__func__, pe->addr, phb->ioda.total_pe,
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hose->global_number);
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/* Sanity check on PE number. PHB PE should have 0 */
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if (pe->addr < 0 ||
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pe->addr >= phb->ioda.total_pe) {
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pr_warn("%s: PHB#%x-PE#%x out of range [0, %x]\n",
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__func__, phb->hose->global_number,
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pe->addr, phb->ioda.total_pe);
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return EEH_STATE_NOT_SUPPORT;
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}
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/*
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* If we're in middle of PE reset, return normal
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* state to keep EEH core going. For PHB reset, we
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* still expect to have fenced PHB cleared with
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* PHB reset.
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*/
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if (!(pe->type & EEH_PE_PHB) &&
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(pe->state & EEH_PE_RESET)) {
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result = (EEH_STATE_MMIO_ACTIVE |
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EEH_STATE_DMA_ACTIVE |
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EEH_STATE_MMIO_ENABLED |
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EEH_STATE_DMA_ENABLED);
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return result;
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}
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if (pe->type & EEH_PE_PHB)
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return ioda_eeh_get_phb_state(pe);
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/* Retrieve PE status through OPAL */
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pe_no = pe->addr;
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ret = opal_pci_eeh_freeze_status(phb->opal_id, pe_no,
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&fstate, &pcierr, NULL);
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if (ret) {
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pr_err("%s: Failed to get EEH status on "
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"PHB#%x-PE#%x\n, err=%lld\n",
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__func__, hose->global_number, pe_no, ret);
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return EEH_STATE_NOT_SUPPORT;
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}
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/* Check PHB status */
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if (pe->type & EEH_PE_PHB) {
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result = 0;
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result &= ~EEH_STATE_RESET_ACTIVE;
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if (be16_to_cpu(pcierr) != OPAL_EEH_PHB_ERROR) {
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result |= EEH_STATE_MMIO_ACTIVE;
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result |= EEH_STATE_DMA_ACTIVE;
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result |= EEH_STATE_MMIO_ENABLED;
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result |= EEH_STATE_DMA_ENABLED;
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} else if (!(pe->state & EEH_PE_ISOLATED)) {
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eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
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ioda_eeh_phb_diag(pe);
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}
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return result;
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}
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/* Parse result out */
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result = 0;
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switch (fstate) {
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case OPAL_EEH_STOPPED_NOT_FROZEN:
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result &= ~EEH_STATE_RESET_ACTIVE;
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result |= EEH_STATE_MMIO_ACTIVE;
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result |= EEH_STATE_DMA_ACTIVE;
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result |= EEH_STATE_MMIO_ENABLED;
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result |= EEH_STATE_DMA_ENABLED;
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break;
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case OPAL_EEH_STOPPED_MMIO_FREEZE:
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result &= ~EEH_STATE_RESET_ACTIVE;
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result |= EEH_STATE_DMA_ACTIVE;
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result |= EEH_STATE_DMA_ENABLED;
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break;
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case OPAL_EEH_STOPPED_DMA_FREEZE:
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result &= ~EEH_STATE_RESET_ACTIVE;
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result |= EEH_STATE_MMIO_ACTIVE;
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result |= EEH_STATE_MMIO_ENABLED;
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break;
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case OPAL_EEH_STOPPED_MMIO_DMA_FREEZE:
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result &= ~EEH_STATE_RESET_ACTIVE;
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break;
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case OPAL_EEH_STOPPED_RESET:
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result |= EEH_STATE_RESET_ACTIVE;
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break;
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case OPAL_EEH_STOPPED_TEMP_UNAVAIL:
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result |= EEH_STATE_UNAVAILABLE;
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break;
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case OPAL_EEH_STOPPED_PERM_UNAVAIL:
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result |= EEH_STATE_NOT_SUPPORT;
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break;
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default:
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pr_warning("%s: Unexpected EEH status 0x%x "
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"on PHB#%x-PE#%x\n",
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__func__, fstate, hose->global_number, pe_no);
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}
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/* Dump PHB diag-data for frozen PE */
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if (result != EEH_STATE_NOT_SUPPORT &&
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(result & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) !=
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(EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE) &&
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!(pe->state & EEH_PE_ISOLATED)) {
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eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
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ioda_eeh_phb_diag(pe);
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}
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return result;
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return ioda_eeh_get_pe_state(pe);
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}
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static s64 ioda_eeh_phb_poll(struct pnv_phb *phb)
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