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ARM: dts: arria10: Add EMAC OCP reset property
Add the EMAC's OCP reset property on Arria10. The OCP reset bits are also needed to correctly bring the EMACs out of reset correctly. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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@ -431,8 +431,8 @@ gmac0: ethernet@ff800000 {
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rx-fifo-depth = <16384>;
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rx-fifo-depth = <16384>;
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clocks = <&l4_mp_clk>;
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clocks = <&l4_mp_clk>;
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clock-names = "stmmaceth";
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clock-names = "stmmaceth";
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resets = <&rst EMAC0_RESET>;
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resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
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reset-names = "stmmaceth";
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reset-names = "stmmaceth", "stmmaceth-ocp";
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snps,axi-config = <&socfpga_axi_setup>;
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snps,axi-config = <&socfpga_axi_setup>;
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status = "disabled";
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status = "disabled";
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};
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};
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@ -451,8 +451,8 @@ gmac1: ethernet@ff802000 {
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rx-fifo-depth = <16384>;
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rx-fifo-depth = <16384>;
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clocks = <&l4_mp_clk>;
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clocks = <&l4_mp_clk>;
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clock-names = "stmmaceth";
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clock-names = "stmmaceth";
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resets = <&rst EMAC1_RESET>;
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resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
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reset-names = "stmmaceth";
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reset-names = "stmmaceth", "stmmaceth-ocp";
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snps,axi-config = <&socfpga_axi_setup>;
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snps,axi-config = <&socfpga_axi_setup>;
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status = "disabled";
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status = "disabled";
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};
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};
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@ -470,8 +470,9 @@ gmac2: ethernet@ff804000 {
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tx-fifo-depth = <4096>;
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tx-fifo-depth = <4096>;
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rx-fifo-depth = <16384>;
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rx-fifo-depth = <16384>;
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clocks = <&l4_mp_clk>;
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clocks = <&l4_mp_clk>;
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resets = <&rst EMAC2_RESET>;
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clock-names = "stmmaceth";
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clock-names = "stmmaceth";
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resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
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reset-names = "stmmaceth", "stmmaceth-ocp";
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snps,axi-config = <&socfpga_axi_setup>;
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snps,axi-config = <&socfpga_axi_setup>;
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status = "disabled";
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status = "disabled";
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};
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};
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