mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 17:50:52 +07:00
Merge master.kernel.org:/home/rmk/linux-2.6-arm
This commit is contained in:
commit
c931488cc4
@ -53,7 +53,7 @@ tune-$(CONFIG_CPU_ARM926T) :=-mtune=arm9tdmi
|
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tune-$(CONFIG_CPU_SA110) :=-mtune=strongarm110
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tune-$(CONFIG_CPU_SA1100) :=-mtune=strongarm1100
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tune-$(CONFIG_CPU_XSCALE) :=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale
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tune-$(CONFIG_CPU_V6) :=-mtune=strongarm
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tune-$(CONFIG_CPU_V6) :=$(call cc-option,-mtune=arm1136j-s,-mtune=strongarm)
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# Need -Uarm for gcc < 3.x
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CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,)
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|
@ -45,8 +45,8 @@ extern void fp_enter(void);
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#define EXPORT_SYMBOL_ALIAS(sym,orig) \
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EXPORT_CRC_ALIAS(sym) \
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const struct kernel_symbol __ksymtab_##sym \
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__attribute__((section("__ksymtab"))) = \
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static const struct kernel_symbol __ksymtab_##sym \
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__attribute_used__ __attribute__((section("__ksymtab"))) = \
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{ (unsigned long)&orig, #sym };
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/*
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|
@ -106,15 +106,10 @@ ENTRY(ret_from_fork)
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.endm
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.Larm700bug:
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ldr r0, [sp, #S_PSR] @ Get calling cpsr
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sub lr, lr, #4
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str lr, [r8]
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msr spsr_cxsf, r0
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ldmia sp, {r0 - lr}^ @ Get calling r0 - lr
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mov r0, r0
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ldr lr, [sp, #S_PC] @ Get PC
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add sp, sp, #S_FRAME_SIZE
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movs pc, lr
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subs pc, lr, #4
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#else
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.macro arm710_bug_check, instr, temp
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.endm
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|
@ -125,7 +125,7 @@ static int external_map[] = { 2 };
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static int chip0_map[] = { 0 };
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static int chip1_map[] = { 1 };
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struct mtd_partition anubis_default_nand_part[] = {
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static struct mtd_partition anubis_default_nand_part[] = {
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[0] = {
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.name = "Boot Agent",
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.size = SZ_16K,
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|
@ -230,7 +230,7 @@ static int chip0_map[] = { 1 };
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static int chip1_map[] = { 2 };
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static int chip2_map[] = { 3 };
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struct mtd_partition bast_default_nand_part[] = {
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static struct mtd_partition bast_default_nand_part[] = {
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[0] = {
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.name = "Boot Agent",
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.size = SZ_16K,
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@ -340,7 +340,7 @@ static struct resource bast_dm9k_resource[] = {
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* better IO routines can be written and tested
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*/
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struct dm9000_plat_data bast_dm9k_platdata = {
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static struct dm9000_plat_data bast_dm9k_platdata = {
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.flags = DM9000_PLATF_16BITONLY
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};
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|
@ -288,7 +288,7 @@ static struct resource vr1000_dm9k1_resource[] = {
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* better IO routines can be written and tested
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*/
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struct dm9000_plat_data vr1000_dm9k_platdata = {
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static struct dm9000_plat_data vr1000_dm9k_platdata = {
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.flags = DM9000_PLATF_16BITONLY,
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};
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|
@ -125,9 +125,6 @@ static struct platform_device *uart_devices[] __initdata = {
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&s3c_uart2
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};
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/* store our uart devices for the serial driver console */
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struct platform_device *s3c2410_uart_devices[3];
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static int s3c2410_uart_count = 0;
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/* uart registration process */
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|
@ -151,7 +151,7 @@ void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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#ifdef CONFIG_PM
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struct sleep_save s3c2440_sleep[] = {
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static struct sleep_save s3c2440_sleep[] = {
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SAVE_ITEM(S3C2440_DSC0),
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SAVE_ITEM(S3C2440_DSC1),
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SAVE_ITEM(S3C2440_GPJDAT),
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@ -260,7 +260,7 @@ void __init s3c2440_init_clocks(int xtal)
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* as a driver which may support both 2410 and 2440 may try and use it.
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*/
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int __init s3c2440_core_init(void)
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static int __init s3c2440_core_init(void)
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{
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return sysdev_class_register(&s3c2440_sysclass);
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}
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|
@ -38,6 +38,7 @@
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#include <asm/hardware/clock.h>
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#include "clock.h"
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#include "cpu.h"
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static unsigned long timer_startval;
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static unsigned long timer_usec_ticks;
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|
@ -111,7 +111,7 @@ proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
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}
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static int proc_alignment_write(struct file *file, const char __user *buffer,
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unsigned long count, void *data)
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unsigned long count, void *data)
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{
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char mode;
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@ -119,7 +119,7 @@ static int proc_alignment_write(struct file *file, const char __user *buffer,
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if (get_user(mode, buffer))
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return -EFAULT;
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if (mode >= '0' && mode <= '5')
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ai_usermode = mode - '0';
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ai_usermode = mode - '0';
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}
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return count;
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}
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@ -262,7 +262,7 @@ union offset_union {
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goto fault; \
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} while (0)
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#define put32_unaligned_check(val,addr) \
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#define put32_unaligned_check(val,addr) \
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__put32_unaligned_check("strb", val, addr)
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#define put32t_unaligned_check(val,addr) \
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@ -306,19 +306,19 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r
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return TYPE_LDST;
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user:
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if (LDST_L_BIT(instr)) {
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unsigned long val;
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get16t_unaligned_check(val, addr);
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if (LDST_L_BIT(instr)) {
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unsigned long val;
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get16t_unaligned_check(val, addr);
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/* signed half-word? */
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if (instr & 0x40)
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val = (signed long)((signed short) val);
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/* signed half-word? */
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if (instr & 0x40)
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val = (signed long)((signed short) val);
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regs->uregs[rd] = val;
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} else
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put16t_unaligned_check(regs->uregs[rd], addr);
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regs->uregs[rd] = val;
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} else
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put16t_unaligned_check(regs->uregs[rd], addr);
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return TYPE_LDST;
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return TYPE_LDST;
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fault:
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return TYPE_FAULT;
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@ -342,11 +342,11 @@ do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
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unsigned long val;
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get32_unaligned_check(val, addr);
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regs->uregs[rd] = val;
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get32_unaligned_check(val, addr+4);
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regs->uregs[rd+1] = val;
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get32_unaligned_check(val, addr + 4);
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regs->uregs[rd + 1] = val;
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} else {
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put32_unaligned_check(regs->uregs[rd], addr);
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put32_unaligned_check(regs->uregs[rd+1], addr+4);
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put32_unaligned_check(regs->uregs[rd + 1], addr + 4);
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}
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return TYPE_LDST;
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@ -356,11 +356,11 @@ do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
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unsigned long val;
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get32t_unaligned_check(val, addr);
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regs->uregs[rd] = val;
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get32t_unaligned_check(val, addr+4);
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regs->uregs[rd+1] = val;
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get32t_unaligned_check(val, addr + 4);
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regs->uregs[rd + 1] = val;
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} else {
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put32t_unaligned_check(regs->uregs[rd], addr);
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put32t_unaligned_check(regs->uregs[rd+1], addr+4);
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put32t_unaligned_check(regs->uregs[rd + 1], addr + 4);
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}
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return TYPE_LDST;
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@ -443,7 +443,7 @@ do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *reg
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if (LDST_P_EQ_U(instr)) /* U = P */
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eaddr += 4;
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/*
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/*
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* For alignment faults on the ARM922T/ARM920T the MMU makes
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* the FSR (and hence addr) equal to the updated base address
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* of the multiple access rather than the restored value.
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@ -570,7 +570,7 @@ thumb2arm(u16 tinstr)
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/* 6.5.1 Format 3: */
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case 0x4800 >> 11: /* 7.1.28 LDR(3) */
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/* NOTE: This case is not technically possible. We're
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* loading 32-bit memory data via PC relative
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* loading 32-bit memory data via PC relative
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* addressing mode. So we can and should eliminate
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* this case. But I'll leave it here for now.
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*/
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@ -642,7 +642,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
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if (fault) {
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type = TYPE_FAULT;
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goto bad_or_fault;
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goto bad_or_fault;
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}
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if (user_mode(regs))
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|
@ -31,11 +31,6 @@
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#include <linux/string.h>
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#include <asm/system.h>
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/* forward declarations */
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unsigned int EmulateCPDO(const unsigned int);
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unsigned int EmulateCPDT(const unsigned int);
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unsigned int EmulateCPRT(const unsigned int);
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/* Reset the FPA11 chip. Called to initialize and reset the emulator. */
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static void resetFPA11(void)
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{
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|
@ -95,4 +95,24 @@ extern int8 SetRoundingMode(const unsigned int);
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extern int8 SetRoundingPrecision(const unsigned int);
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extern void nwfpe_init_fpa(union fp_state *fp);
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extern unsigned int EmulateAll(unsigned int opcode);
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extern unsigned int EmulateCPDT(const unsigned int opcode);
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extern unsigned int EmulateCPDO(const unsigned int opcode);
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extern unsigned int EmulateCPRT(const unsigned int opcode);
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|
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/* fpa11_cpdt.c */
|
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extern unsigned int PerformLDF(const unsigned int opcode);
|
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extern unsigned int PerformSTF(const unsigned int opcode);
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extern unsigned int PerformLFM(const unsigned int opcode);
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extern unsigned int PerformSFM(const unsigned int opcode);
|
||||
|
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/* single_cpdo.c */
|
||||
|
||||
extern unsigned int SingleCPDO(struct roundingData *roundData,
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const unsigned int opcode, FPREG * rFd);
|
||||
/* double_cpdo.c */
|
||||
extern unsigned int DoubleCPDO(struct roundingData *roundData,
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const unsigned int opcode, FPREG * rFd);
|
||||
|
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#endif
|
||||
|
@ -26,12 +26,11 @@
|
||||
#include "fpa11.inl"
|
||||
#include "fpmodule.h"
|
||||
#include "fpmodule.inl"
|
||||
#include "softfloat.h"
|
||||
|
||||
#ifdef CONFIG_FPE_NWFPE_XP
|
||||
extern flag floatx80_is_nan(floatx80);
|
||||
#endif
|
||||
extern flag float64_is_nan(float64);
|
||||
extern flag float32_is_nan(float32);
|
||||
|
||||
unsigned int PerformFLT(const unsigned int opcode);
|
||||
unsigned int PerformFIX(const unsigned int opcode);
|
||||
|
@ -476,4 +476,10 @@ static inline unsigned int getDestinationSize(const unsigned int opcode)
|
||||
return (nRc);
|
||||
}
|
||||
|
||||
extern unsigned int checkCondition(const unsigned int opcode,
|
||||
const unsigned int ccodes);
|
||||
|
||||
extern const float64 float64Constant[];
|
||||
extern const float32 float32Constant[];
|
||||
|
||||
#endif
|
||||
|
@ -265,4 +265,7 @@ static inline flag float64_lt_nocheck(float64 a, float64 b)
|
||||
return (a != b) && (aSign ^ (a < b));
|
||||
}
|
||||
|
||||
extern flag float32_is_nan( float32 a );
|
||||
extern flag float64_is_nan( float64 a );
|
||||
|
||||
#endif
|
||||
|
@ -73,7 +73,7 @@ struct imx_port {
|
||||
struct uart_port port;
|
||||
struct timer_list timer;
|
||||
unsigned int old_status;
|
||||
int txirq,rxirq;
|
||||
int txirq,rxirq,rtsirq;
|
||||
};
|
||||
|
||||
/*
|
||||
@ -181,6 +181,22 @@ static void imx_start_tx(struct uart_port *port)
|
||||
imx_transmit_buffer(sport);
|
||||
}
|
||||
|
||||
static irqreturn_t imx_rtsint(int irq, void *dev_id, struct pt_regs *regs)
|
||||
{
|
||||
struct imx_port *sport = (struct imx_port *)dev_id;
|
||||
unsigned int val = USR1((u32)sport->port.membase)&USR1_RTSS;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&sport->port.lock, flags);
|
||||
|
||||
USR1((u32)sport->port.membase) = USR1_RTSD;
|
||||
uart_handle_cts_change(&sport->port, !!val);
|
||||
wake_up_interruptible(&sport->port.info->delta_msr_wait);
|
||||
|
||||
spin_unlock_irqrestore(&sport->port.lock, flags);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static irqreturn_t imx_txint(int irq, void *dev_id, struct pt_regs *regs)
|
||||
{
|
||||
struct imx_port *sport = (struct imx_port *)dev_id;
|
||||
@ -386,15 +402,21 @@ static int imx_startup(struct uart_port *port)
|
||||
if (retval) goto error_out1;
|
||||
|
||||
retval = request_irq(sport->txirq, imx_txint, 0,
|
||||
"imx-uart", sport);
|
||||
DRIVER_NAME, sport);
|
||||
if (retval) goto error_out2;
|
||||
|
||||
retval = request_irq(sport->rtsirq, imx_rtsint, 0,
|
||||
DRIVER_NAME, sport);
|
||||
if (retval) goto error_out3;
|
||||
set_irq_type(sport->rtsirq, IRQT_BOTHEDGE);
|
||||
|
||||
/*
|
||||
* Finally, clear and enable interrupts
|
||||
*/
|
||||
|
||||
USR1((u32)sport->port.membase) = USR1_RTSD;
|
||||
UCR1((u32)sport->port.membase) |=
|
||||
(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN);
|
||||
(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
|
||||
|
||||
UCR2((u32)sport->port.membase) |= (UCR2_RXEN | UCR2_TXEN);
|
||||
/*
|
||||
@ -406,6 +428,8 @@ static int imx_startup(struct uart_port *port)
|
||||
|
||||
return 0;
|
||||
|
||||
error_out3:
|
||||
free_irq(sport->txirq, sport);
|
||||
error_out2:
|
||||
free_irq(sport->rxirq, sport);
|
||||
error_out1:
|
||||
@ -424,6 +448,7 @@ static void imx_shutdown(struct uart_port *port)
|
||||
/*
|
||||
* Free the interrupts
|
||||
*/
|
||||
free_irq(sport->rtsirq, sport);
|
||||
free_irq(sport->txirq, sport);
|
||||
free_irq(sport->rxirq, sport);
|
||||
|
||||
@ -432,7 +457,7 @@ static void imx_shutdown(struct uart_port *port)
|
||||
*/
|
||||
|
||||
UCR1((u32)sport->port.membase) &=
|
||||
~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN);
|
||||
~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -522,7 +547,7 @@ imx_set_termios(struct uart_port *port, struct termios *termios,
|
||||
* disable interrupts and drain transmitter
|
||||
*/
|
||||
old_ucr1 = UCR1((u32)sport->port.membase);
|
||||
UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN);
|
||||
UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
|
||||
|
||||
while ( !(USR2((u32)sport->port.membase) & USR2_TXDC))
|
||||
barrier();
|
||||
@ -643,6 +668,7 @@ static struct imx_port imx_ports[] = {
|
||||
{
|
||||
.txirq = UART1_MINT_TX,
|
||||
.rxirq = UART1_MINT_RX,
|
||||
.rtsirq = UART1_MINT_RTS,
|
||||
.port = {
|
||||
.type = PORT_IMX,
|
||||
.iotype = SERIAL_IO_MEM,
|
||||
@ -658,6 +684,7 @@ static struct imx_port imx_ports[] = {
|
||||
}, {
|
||||
.txirq = UART2_MINT_TX,
|
||||
.rxirq = UART2_MINT_RX,
|
||||
.rtsirq = UART2_MINT_RTS,
|
||||
.port = {
|
||||
.type = PORT_IMX,
|
||||
.iotype = SERIAL_IO_MEM,
|
||||
@ -737,7 +764,7 @@ imx_console_write(struct console *co, const char *s, unsigned int count)
|
||||
|
||||
UCR1((u32)sport->port.membase) =
|
||||
(old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN)
|
||||
& ~(UCR1_TXMPTYEN | UCR1_RRDYEN);
|
||||
& ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
|
||||
UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN;
|
||||
|
||||
/*
|
||||
|
@ -499,7 +499,7 @@ serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
|
||||
/*
|
||||
* Update the per-port timeout.
|
||||
*/
|
||||
uart_update_timeout(port, termios->c_cflag, quot);
|
||||
uart_update_timeout(port, termios->c_cflag, baud);
|
||||
|
||||
up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
|
||||
if (termios->c_iflag & INPCK)
|
||||
|
@ -1092,8 +1092,8 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
|
||||
|
||||
static int probe_index = 0;
|
||||
|
||||
int s3c24xx_serial_probe(struct device *_dev,
|
||||
struct s3c24xx_uart_info *info)
|
||||
static int s3c24xx_serial_probe(struct device *_dev,
|
||||
struct s3c24xx_uart_info *info)
|
||||
{
|
||||
struct s3c24xx_uart_port *ourport;
|
||||
struct platform_device *dev = to_platform_device(_dev);
|
||||
@ -1120,7 +1120,7 @@ int s3c24xx_serial_probe(struct device *_dev,
|
||||
return ret;
|
||||
}
|
||||
|
||||
int s3c24xx_serial_remove(struct device *_dev)
|
||||
static int s3c24xx_serial_remove(struct device *_dev)
|
||||
{
|
||||
struct uart_port *port = s3c24xx_dev_to_port(_dev);
|
||||
|
||||
@ -1134,7 +1134,8 @@ int s3c24xx_serial_remove(struct device *_dev)
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
int s3c24xx_serial_suspend(struct device *dev, pm_message_t state, u32 level)
|
||||
static int s3c24xx_serial_suspend(struct device *dev, pm_message_t state,
|
||||
u32 level)
|
||||
{
|
||||
struct uart_port *port = s3c24xx_dev_to_port(dev);
|
||||
|
||||
@ -1144,7 +1145,7 @@ int s3c24xx_serial_suspend(struct device *dev, pm_message_t state, u32 level)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int s3c24xx_serial_resume(struct device *dev, u32 level)
|
||||
static int s3c24xx_serial_resume(struct device *dev, u32 level)
|
||||
{
|
||||
struct uart_port *port = s3c24xx_dev_to_port(dev);
|
||||
struct s3c24xx_uart_port *ourport = to_ourport(port);
|
||||
@ -1165,8 +1166,8 @@ int s3c24xx_serial_resume(struct device *dev, u32 level)
|
||||
#define s3c24xx_serial_resume NULL
|
||||
#endif
|
||||
|
||||
int s3c24xx_serial_init(struct device_driver *drv,
|
||||
struct s3c24xx_uart_info *info)
|
||||
static int s3c24xx_serial_init(struct device_driver *drv,
|
||||
struct s3c24xx_uart_info *info)
|
||||
{
|
||||
dbg("s3c24xx_serial_init(%p,%p)\n", drv, info);
|
||||
return driver_register(drv);
|
||||
|
@ -126,8 +126,8 @@
|
||||
#define DRCMR12 __REG(0x40000130) /* Request to Channel Map Register for AC97 audio transmit Request */
|
||||
#define DRCMR13 __REG(0x40000134) /* Request to Channel Map Register for SSP receive Request */
|
||||
#define DRCMR14 __REG(0x40000138) /* Request to Channel Map Register for SSP transmit Request */
|
||||
#define DRCMR15 __REG(0x4000013c) /* Reserved */
|
||||
#define DRCMR16 __REG(0x40000140) /* Reserved */
|
||||
#define DRCMR15 __REG(0x4000013c) /* Request to Channel Map Register for SSP2 receive Request */
|
||||
#define DRCMR16 __REG(0x40000140) /* Request to Channel Map Register for SSP2 transmit Request */
|
||||
#define DRCMR17 __REG(0x40000144) /* Request to Channel Map Register for ICP receive Request */
|
||||
#define DRCMR18 __REG(0x40000148) /* Request to Channel Map Register for ICP transmit Request */
|
||||
#define DRCMR19 __REG(0x4000014c) /* Request to Channel Map Register for STUART receive Request */
|
||||
@ -151,7 +151,8 @@
|
||||
#define DRCMR37 __REG(0x40000194) /* Request to Channel Map Register for USB endpoint 13 Request */
|
||||
#define DRCMR38 __REG(0x40000198) /* Request to Channel Map Register for USB endpoint 14 Request */
|
||||
#define DRCMR39 __REG(0x4000019C) /* Reserved */
|
||||
|
||||
#define DRCMR66 __REG(0x40001108) /* Request to Channel Map Register for SSP3 receive Request */
|
||||
#define DRCMR67 __REG(0x4000110C) /* Request to Channel Map Register for SSP3 transmit Request */
|
||||
#define DRCMR68 __REG(0x40001110) /* Request to Channel Map Register for Camera FIFO 0 Request */
|
||||
#define DRCMR69 __REG(0x40001114) /* Request to Channel Map Register for Camera FIFO 1 Request */
|
||||
#define DRCMR70 __REG(0x40001118) /* Request to Channel Map Register for Camera FIFO 2 Request */
|
||||
|
@ -92,6 +92,13 @@ extern unsigned int s3c2410_gpio_getpin(unsigned int pin);
|
||||
|
||||
extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg);
|
||||
|
||||
#ifdef CONFIG_CPU_S3C2440
|
||||
|
||||
extern int s3c2440_set_dsc(unsigned int pin, unsigned int value);
|
||||
|
||||
#endif /* CONFIG_CPU_S3C2440 */
|
||||
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#include <asm/sizes.h>
|
||||
|
Loading…
Reference in New Issue
Block a user