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ARM: tegra: Add high speed UARTs to Jetson TK1 device tree

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This patch enables the APB DMA high speed UARTs of the Jetson TK1. So
far, they were only enabled in NVidia's official BSP.

Those additional UARTs are exposed on the expansion connector J3A2:

 UART1:
  Pin 41: BR_UART1_TXD
  Pin 44: BR_UART1_RXD

 UART2:
  Pin 65: UART2_RXD
  Pin 68: UART2_TXD
  Pin 71: UART2_CTS_L
  Pin 74: UART2_RTS_L

Signed-off-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Ralf Ramsauer 2016-01-26 17:59:18 +01:00 committed by Thierry Reding
parent e10982487d
commit c90bb7b9b9
1 changed files with 26 additions and 0 deletions
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26
arch/arm/boot/dts/tegra124-jetson-tk1.dts
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@ -12,7 +12,11 @@ / {
aliases {
rtc0 = "/i2c@0,7000d000/pmic@40";
rtc1 = "/rtc@0,7000e000";
/* This order keeps the mapping DB9 connector <-> ttyS0 */
serial0 = &uartd;
serial1 = &uarta;
serial2 = &uartb;
};
memory {
@ -1367,6 +1371,28 @@ jtag_rtck {
};
};
/*
* First high speed UART, exposed on the expansion connector J3A2
* Pin 41: BR_UART1_TXD
* Pin 44: BR_UART1_RXD
*/
serial@70006000 {
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
status = "okay";
};
/*
* Second high speed UART, exposed on the expansion connector J3A2
* Pin 65: UART2_RXD
* Pin 68: UART2_TXD
* Pin 71: UART2_CTS_L
* Pin 74: UART2_RTS_L
*/
serial@70006040 {
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
status = "okay";
};
/* DB9 serial port */
serial@0,70006300 {
status = "okay";