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clk: add gpio gated clock
The added gpio-gate-clock is a basic clock that can be enabled and disabled trough a gpio output. The DT binding document for the clock is also added. For EPROBE_DEFER handling the registering of the clock has to be delayed until of_clk_get() call time. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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21
Documentation/devicetree/bindings/clock/gpio-gate-clock.txt
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21
Documentation/devicetree/bindings/clock/gpio-gate-clock.txt
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@ -0,0 +1,21 @@
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Binding for simple gpio gated clock.
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This binding uses the common clock binding[1].
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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Required properties:
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- compatible : shall be "gpio-gate-clock".
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- #clock-cells : from common clock binding; shall be set to 0.
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- enable-gpios : GPIO reference for enabling and disabling the clock.
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Optional properties:
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- clocks: Maximum of one parent clock is supported.
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Example:
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clock {
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compatible = "gpio-gate-clock";
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clocks = <&parentclk>;
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#clock-cells = <0>;
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enable-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
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};
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@ -9,6 +9,7 @@ obj-$(CONFIG_COMMON_CLK) += clk-gate.o
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obj-$(CONFIG_COMMON_CLK) += clk-mux.o
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obj-$(CONFIG_COMMON_CLK) += clk-composite.o
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obj-$(CONFIG_COMMON_CLK) += clk-fractional-divider.o
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obj-$(CONFIG_COMMON_CLK) += clk-gpio-gate.o
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ifeq ($(CONFIG_OF), y)
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obj-$(CONFIG_COMMON_CLK) += clk-conf.o
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endif
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204
drivers/clk/clk-gpio-gate.c
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204
drivers/clk/clk-gpio-gate.c
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/*
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* Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
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* Author: Jyri Sarha <jsarha@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Gpio gated clock implementation
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*/
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#include <linux/clk-provider.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/gpio.h>
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#include <linux/of_gpio.h>
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#include <linux/err.h>
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#include <linux/device.h>
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/**
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* DOC: basic gpio gated clock which can be enabled and disabled
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* with gpio output
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* Traits of this clock:
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* prepare - clk_(un)prepare only ensures parent is (un)prepared
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* enable - clk_enable and clk_disable are functional & control gpio
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* rate - inherits rate from parent. No clk_set_rate support
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* parent - fixed parent. No clk_set_parent support
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*/
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#define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw)
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static int clk_gpio_gate_enable(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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gpiod_set_value(clk->gpiod, 1);
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return 0;
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}
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static void clk_gpio_gate_disable(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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gpiod_set_value(clk->gpiod, 0);
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}
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static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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return gpiod_get_value(clk->gpiod);
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}
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const struct clk_ops clk_gpio_gate_ops = {
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.enable = clk_gpio_gate_enable,
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.disable = clk_gpio_gate_disable,
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.is_enabled = clk_gpio_gate_is_enabled,
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};
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EXPORT_SYMBOL_GPL(clk_gpio_gate_ops);
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/**
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* clk_register_gpio - register a gpip clock with the clock framework
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* @dev: device that is registering this clock
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* @name: name of this clock
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* @parent_name: name of this clock's parent
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* @gpiod: gpio descriptor to gate this clock
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*/
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struct clk *clk_register_gpio_gate(struct device *dev, const char *name,
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const char *parent_name, struct gpio_desc *gpiod,
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unsigned long flags)
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{
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struct clk_gpio *clk_gpio = NULL;
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struct clk *clk = ERR_PTR(-EINVAL);
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struct clk_init_data init = { NULL };
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unsigned long gpio_flags;
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int err;
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if (gpiod_is_active_low(gpiod))
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gpio_flags = GPIOF_OUT_INIT_HIGH;
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else
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gpio_flags = GPIOF_OUT_INIT_LOW;
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if (dev)
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err = devm_gpio_request_one(dev, desc_to_gpio(gpiod),
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gpio_flags, name);
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else
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err = gpio_request_one(desc_to_gpio(gpiod), gpio_flags, name);
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if (err) {
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pr_err("%s: %s: Error requesting clock control gpio %u\n",
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__func__, name, desc_to_gpio(gpiod));
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return ERR_PTR(err);
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}
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if (dev)
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clk_gpio = devm_kzalloc(dev, sizeof(struct clk_gpio),
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GFP_KERNEL);
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else
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clk_gpio = kzalloc(sizeof(struct clk_gpio), GFP_KERNEL);
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if (!clk_gpio) {
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clk = ERR_PTR(-ENOMEM);
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goto clk_register_gpio_gate_err;
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}
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init.name = name;
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init.ops = &clk_gpio_gate_ops;
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init.flags = flags | CLK_IS_BASIC;
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init.parent_names = (parent_name ? &parent_name : NULL);
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init.num_parents = (parent_name ? 1 : 0);
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clk_gpio->gpiod = gpiod;
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clk_gpio->hw.init = &init;
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clk = clk_register(dev, &clk_gpio->hw);
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if (!IS_ERR(clk))
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return clk;
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if (!dev)
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kfree(clk_gpio);
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clk_register_gpio_gate_err:
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gpiod_put(gpiod);
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return clk;
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}
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EXPORT_SYMBOL_GPL(clk_register_gpio_gate);
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#ifdef CONFIG_OF
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/**
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* The clk_register_gpio_gate has to be delayed, because the EPROBE_DEFER
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* can not be handled properly at of_clk_init() call time.
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*/
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struct clk_gpio_gate_delayed_register_data {
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struct device_node *node;
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struct mutex lock;
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struct clk *clk;
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};
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static struct clk *of_clk_gpio_gate_delayed_register_get(
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struct of_phandle_args *clkspec,
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void *_data)
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{
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struct clk_gpio_gate_delayed_register_data *data = _data;
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struct clk *clk;
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const char *clk_name = data->node->name;
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const char *parent_name;
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struct gpio_desc *gpiod;
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int gpio;
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mutex_lock(&data->lock);
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if (data->clk) {
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mutex_unlock(&data->lock);
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return data->clk;
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}
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gpio = of_get_named_gpio_flags(data->node, "enable-gpios", 0, NULL);
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if (gpio < 0) {
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mutex_unlock(&data->lock);
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if (gpio != -EPROBE_DEFER)
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pr_err("%s: %s: Can't get 'enable-gpios' DT property\n",
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__func__, clk_name);
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return ERR_PTR(gpio);
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}
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gpiod = gpio_to_desc(gpio);
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parent_name = of_clk_get_parent_name(data->node, 0);
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clk = clk_register_gpio_gate(NULL, clk_name, parent_name, gpiod, 0);
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if (IS_ERR(clk)) {
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mutex_unlock(&data->lock);
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return clk;
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}
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data->clk = clk;
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mutex_unlock(&data->lock);
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return clk;
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}
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/**
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* of_gpio_gate_clk_setup() - Setup function for gpio controlled clock
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*/
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void __init of_gpio_gate_clk_setup(struct device_node *node)
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{
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struct clk_gpio_gate_delayed_register_data *data;
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data = kzalloc(sizeof(struct clk_gpio_gate_delayed_register_data),
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GFP_KERNEL);
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if (!data)
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return;
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data->node = node;
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mutex_init(&data->lock);
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of_clk_add_provider(node, of_clk_gpio_gate_delayed_register_get, data);
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}
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EXPORT_SYMBOL_GPL(of_gpio_gate_clk_setup);
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CLK_OF_DECLARE(gpio_gate_clk, "gpio-gate-clock", of_gpio_gate_clk_setup);
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#endif
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@ -488,6 +488,28 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
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struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
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unsigned long flags);
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/***
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* struct clk_gpio_gate - gpio gated clock
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*
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* @hw: handle between common and hardware-specific interfaces
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* @gpiod: gpio descriptor
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*
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* Clock with a gpio control for enabling and disabling the parent clock.
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* Implements .enable, .disable and .is_enabled
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*/
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struct clk_gpio {
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struct clk_hw hw;
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struct gpio_desc *gpiod;
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};
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extern const struct clk_ops clk_gpio_gate_ops;
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struct clk *clk_register_gpio_gate(struct device *dev, const char *name,
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const char *parent_name, struct gpio_desc *gpio,
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unsigned long flags);
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void of_gpio_clk_gate_setup(struct device_node *node);
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/**
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* clk_register - allocate a new clock, register it and return an opaque cookie
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* @dev: device that is registering this clock
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