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ARM: shmobile: r8a7790: Remove MSIOF address from device tree
MSIOF Base Address H'E6xx can be accessed by CPU and DMAC. MSIOF Base Address H'E7xx for DMAC was removed from H/W manual. Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -1273,7 +1273,7 @@ qspi: spi@e6b10000 {
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msiof0: spi@e6e20000 {
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compatible = "renesas,msiof-r8a7790";
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reg = <0 0xe6e20000 0 0x0064>, <0 0xe7e20000 0 0x0064>;
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reg = <0 0xe6e20000 0 0x0064>;
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interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
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dmas = <&dmac0 0x51>, <&dmac0 0x52>;
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@ -1285,7 +1285,7 @@ msiof0: spi@e6e20000 {
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msiof1: spi@e6e10000 {
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compatible = "renesas,msiof-r8a7790";
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reg = <0 0xe6e10000 0 0x0064>, <0 0xe7e10000 0 0x0064>;
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reg = <0 0xe6e10000 0 0x0064>;
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interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
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dmas = <&dmac0 0x55>, <&dmac0 0x56>;
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@ -1297,7 +1297,7 @@ msiof1: spi@e6e10000 {
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msiof2: spi@e6e00000 {
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compatible = "renesas,msiof-r8a7790";
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reg = <0 0xe6e00000 0 0x0064>, <0 0xe7e00000 0 0x0064>;
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reg = <0 0xe6e00000 0 0x0064>;
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interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
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dmas = <&dmac0 0x41>, <&dmac0 0x42>;
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@ -1309,7 +1309,7 @@ msiof2: spi@e6e00000 {
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msiof3: spi@e6c90000 {
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compatible = "renesas,msiof-r8a7790";
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reg = <0 0xe6c90000 0 0x0064>, <0 0xe7c90000 0 0x0064>;
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reg = <0 0xe6c90000 0 0x0064>;
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interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
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dmas = <&dmac0 0x45>, <&dmac0 0x46>;
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