mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 09:15:42 +07:00
ARM: dts: r8a7793: Stop grouping clocks under a "clocks" subnode
The current practice is to not group clocks under a "clocks" subnode, but just put them together with the other on-SoC devices. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
parent
80e1a5f318
commit
c67e243ccf
@ -972,71 +972,66 @@ can1: can@e6e88000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
/* External root clock */
|
||||
extal_clk: extal {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/* External root clock */
|
||||
extal_clk: extal {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
/*
|
||||
* The external audio clocks are configured as 0 Hz fixed frequency
|
||||
* clocks by default.
|
||||
* Boards that provide audio clocks should override them.
|
||||
*/
|
||||
audio_clk_a: audio_clk_a {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
audio_clk_b: audio_clk_b {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
audio_clk_c: audio_clk_c {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/*
|
||||
* The external audio clocks are configured as 0 Hz fixed frequency clocks by
|
||||
* default. Boards that provide audio clocks should override them.
|
||||
*/
|
||||
audio_clk_a: audio_clk_a {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
audio_clk_b: audio_clk_b {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
audio_clk_c: audio_clk_c {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
/* External USB clock - can be overridden by the board */
|
||||
usb_extal_clk: usb_extal {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
/* External USB clock - can be overridden by the board */
|
||||
usb_extal_clk: usb_extal {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
/* External CAN clock */
|
||||
can_clk: can {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/* External CAN clock */
|
||||
can_clk: can {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
/* External SCIF clock */
|
||||
scif_clk: scif {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/* External SCIF clock */
|
||||
scif_clk: scif {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/* Special CPG clocks */
|
||||
cpg: clock-controller@e6150000 {
|
||||
compatible = "renesas,r8a7793-cpg-mssr";
|
||||
reg = <0 0xe6150000 0 0x1000>;
|
||||
clocks = <&extal_clk>, <&usb_extal_clk>;
|
||||
clock-names = "extal", "usb_extal";
|
||||
#clock-cells = <2>;
|
||||
#power-domain-cells = <0>;
|
||||
};
|
||||
/* Special CPG clocks */
|
||||
cpg: clock-controller@e6150000 {
|
||||
compatible = "renesas,r8a7793-cpg-mssr";
|
||||
reg = <0 0xe6150000 0 0x1000>;
|
||||
clocks = <&extal_clk>, <&usb_extal_clk>;
|
||||
clock-names = "extal", "usb_extal";
|
||||
#clock-cells = <2>;
|
||||
#power-domain-cells = <0>;
|
||||
};
|
||||
|
||||
rst: reset-controller@e6160000 {
|
||||
|
Loading…
Reference in New Issue
Block a user