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ARM: shmobile: r8a7740: add HDMI clock support
It is required from sh_mobile_hdmi driver. This patch is based on v1.0 manual Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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@ -54,6 +54,7 @@
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#define MSTPSR2 0xe6150040
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#define MSTPSR3 0xe6150048
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#define MSTPSR4 0xe615004c
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#define HDMICKCR 0xe6150094
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#define SMSTPCR0 0xe6150130
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#define SMSTPCR1 0xe6150134
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#define SMSTPCR2 0xe6150138
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@ -313,6 +314,79 @@ static struct clk_div4_table div4_table = {
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.kick = div4_kick,
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};
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/* DIV6 reparent */
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enum {
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DIV6_HDMI,
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DIV6_REPARENT_NR,
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};
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static struct clk *hdmi_parent[] = {
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[0] = &pllc1_div2_clk,
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[1] = &system_clk,
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[2] = &dv_clk
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};
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static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
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[DIV6_HDMI] = SH_CLK_DIV6_EXT(HDMICKCR, 0,
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hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2),
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};
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/* HDMI1/2 clock */
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static unsigned long hdmi12_recalc(struct clk *clk)
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{
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u32 val = __raw_readl(HDMICKCR);
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int shift = (int)clk->priv;
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val >>= shift;
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val &= 0x3;
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return clk->parent->rate / (1 << val);
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};
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static int hdmi12_set_rate(struct clk *clk, unsigned long rate)
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{
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u32 val, mask;
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int i, shift;
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for (i = 0; i < 3; i++)
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if (rate == clk->parent->rate / (1 << i))
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goto find;
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return -ENODEV;
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find:
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shift = (int)clk->priv;
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val = __raw_readl(HDMICKCR);
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mask = ~(0x3 << shift);
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val = (val & mask) | i << shift;
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__raw_writel(val, HDMICKCR);
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return 0;
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};
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static struct sh_clk_ops hdmi12_clk_ops = {
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.recalc = hdmi12_recalc,
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.set_rate = hdmi12_set_rate,
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};
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static struct clk hdmi1_clk = {
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.ops = &hdmi12_clk_ops,
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.priv = (void *)9,
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.parent = &div6_reparent_clks[DIV6_HDMI], /* late install */
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};
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static struct clk hdmi2_clk = {
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.ops = &hdmi12_clk_ops,
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.priv = (void *)11,
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.parent = &div6_reparent_clks[DIV6_HDMI], /* late install */
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};
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static struct clk *late_main_clks[] = {
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&hdmi1_clk,
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&hdmi2_clk,
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};
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/* MSTP */
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enum {
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DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP,
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DIV4_HPP, DIV4_USBP, DIV4_S, DIV4_ZB, DIV4_M3, DIV4_CP,
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@ -408,6 +482,8 @@ static struct clk_lookup lookups[] = {
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CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
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CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
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CLKDEV_CON_ID("usb24s", &usb24s_clk),
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CLKDEV_CON_ID("hdmi1", &hdmi1_clk),
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CLKDEV_CON_ID("hdmi2", &hdmi2_clk),
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/* DIV4 clocks */
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CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
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@ -459,6 +535,7 @@ static struct clk_lookup lookups[] = {
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CLKDEV_ICK_ID("phy", "renesas_usbhs", &mstp_clks[MSTP406]),
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CLKDEV_ICK_ID("pci", "renesas_usbhs", &div4_clks[DIV4_USBP]),
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CLKDEV_ICK_ID("usb24", "renesas_usbhs", &usb24_clk),
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CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]),
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};
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void __init r8a7740_clock_init(u8 md_ck)
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@ -494,9 +571,16 @@ void __init r8a7740_clock_init(u8 md_ck)
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if (!ret)
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ret = sh_clk_div6_register(div6_clks, DIV6_NR);
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if (!ret)
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ret = sh_clk_div6_reparent_register(div6_reparent_clks,
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DIV6_REPARENT_NR);
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if (!ret)
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ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
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for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
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ret = clk_register(late_main_clks[k]);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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if (!ret)
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