mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 03:50:53 +07:00
mISDN: Make layer1 timer 3 value configurable
For certification test it is very useful to change the layer1 timer3 value on runtime. Signed-off-by: Karsten Keil <kkeil@linux-pingi.de> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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8423e6b212
commit
c626c12727
@ -868,7 +868,7 @@ channel_ctrl(struct fritzcard *fc, struct mISDN_ctrl_req *cq)
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switch (cq->op) {
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case MISDN_CTRL_GETOP:
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cq->op = MISDN_CTRL_LOOP;
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cq->op = MISDN_CTRL_LOOP | MISDN_CTRL_L1_TIMER3;
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break;
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case MISDN_CTRL_LOOP:
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/* cq->channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */
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@ -878,6 +878,9 @@ channel_ctrl(struct fritzcard *fc, struct mISDN_ctrl_req *cq)
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}
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ret = fc->isac.ctrl(&fc->isac, HW_TESTLOOP, cq->channel);
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break;
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case MISDN_CTRL_L1_TIMER3:
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ret = fc->isac.ctrl(&fc->isac, HW_TIMER3_VALUE, cq->p1);
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break;
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default:
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pr_info("%s: %s unknown Op %x\n", fc->name, __func__, cq->op);
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ret = -EINVAL;
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@ -4161,7 +4161,7 @@ channel_dctrl(struct dchannel *dch, struct mISDN_ctrl_req *cq)
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switch (cq->op) {
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case MISDN_CTRL_GETOP:
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cq->op = MISDN_CTRL_HFC_OP;
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cq->op = MISDN_CTRL_HFC_OP | MISDN_CTRL_L1_TIMER3;
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break;
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case MISDN_CTRL_HFC_WD_INIT: /* init the watchdog */
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wd_cnt = cq->p1 & 0xf;
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@ -4191,6 +4191,9 @@ channel_dctrl(struct dchannel *dch, struct mISDN_ctrl_req *cq)
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__func__);
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HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES);
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break;
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case MISDN_CTRL_L1_TIMER3:
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ret = l1_event(dch->l1, HW_TIMER3_VALUE | (cq->p1 & 0xff));
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break;
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default:
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printk(KERN_WARNING "%s: unknown Op %x\n",
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__func__, cq->op);
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@ -1819,7 +1819,7 @@ channel_ctrl(struct hfc_pci *hc, struct mISDN_ctrl_req *cq)
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switch (cq->op) {
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case MISDN_CTRL_GETOP:
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cq->op = MISDN_CTRL_LOOP | MISDN_CTRL_CONNECT |
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MISDN_CTRL_DISCONNECT;
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MISDN_CTRL_DISCONNECT | MISDN_CTRL_L1_TIMER3;
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break;
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case MISDN_CTRL_LOOP:
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/* channel 0 disabled loop */
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@ -1896,6 +1896,9 @@ channel_ctrl(struct hfc_pci *hc, struct mISDN_ctrl_req *cq)
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Write_hfc(hc, HFCPCI_CONNECT, hc->hw.conn);
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hc->hw.trm &= 0x7f; /* disable IOM-loop */
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break;
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case MISDN_CTRL_L1_TIMER3:
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ret = l1_event(hc->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff));
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break;
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default:
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printk(KERN_WARNING "%s: unknown Op %x\n",
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__func__, cq->op);
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@ -603,10 +603,11 @@ isac_l1hw(struct mISDNchannel *ch, struct sk_buff *skb)
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}
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static int
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isac_ctrl(struct isac_hw *isac, u32 cmd, u_long para)
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isac_ctrl(struct isac_hw *isac, u32 cmd, unsigned long para)
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{
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u8 tl = 0;
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u_long flags;
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unsigned long flags;
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int ret = 0;
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switch (cmd) {
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case HW_TESTLOOP:
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@ -626,12 +627,15 @@ isac_ctrl(struct isac_hw *isac, u32 cmd, u_long para)
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}
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spin_unlock_irqrestore(isac->hwlock, flags);
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break;
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case HW_TIMER3_VALUE:
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ret = l1_event(isac->dch.l1, HW_TIMER3_VALUE | (para & 0xff));
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break;
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default:
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pr_debug("%s: %s unknown command %x %lx\n", isac->name,
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__func__, cmd, para);
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return -1;
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ret = -1;
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}
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return 0;
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return ret;
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}
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static int
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@ -1526,7 +1530,7 @@ channel_ctrl(struct ipac_hw *ipac, struct mISDN_ctrl_req *cq)
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switch (cq->op) {
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case MISDN_CTRL_GETOP:
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cq->op = MISDN_CTRL_LOOP;
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cq->op = MISDN_CTRL_LOOP | MISDN_CTRL_L1_TIMER3;
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break;
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case MISDN_CTRL_LOOP:
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/* cq->channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */
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@ -1536,6 +1540,9 @@ channel_ctrl(struct ipac_hw *ipac, struct mISDN_ctrl_req *cq)
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}
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ret = ipac->ctrl(ipac, HW_TESTLOOP, cq->channel);
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break;
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case MISDN_CTRL_L1_TIMER3:
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ret = ipac->isac.ctrl(&ipac->isac, HW_TIMER3_VALUE, cq->p1);
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break;
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default:
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pr_info("%s: unknown CTRL OP %x\n", ipac->name, cq->op);
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ret = -EINVAL;
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@ -837,7 +837,7 @@ channel_ctrl(struct tiger_hw *card, struct mISDN_ctrl_req *cq)
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switch (cq->op) {
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case MISDN_CTRL_GETOP:
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cq->op = MISDN_CTRL_LOOP;
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cq->op = MISDN_CTRL_LOOP | MISDN_CTRL_L1_TIMER3;
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break;
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case MISDN_CTRL_LOOP:
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/* cq->channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */
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@ -847,6 +847,9 @@ channel_ctrl(struct tiger_hw *card, struct mISDN_ctrl_req *cq)
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}
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ret = card->isac.ctrl(&card->isac, HW_TESTLOOP, cq->channel);
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break;
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case MISDN_CTRL_L1_TIMER3:
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ret = card->isac.ctrl(&card->isac, HW_TIMER3_VALUE, cq->p1);
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break;
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default:
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pr_info("%s: %s unknown Op %x\n", card->name, __func__, cq->op);
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ret = -EINVAL;
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@ -224,7 +224,7 @@ channel_ctrl(struct sfax_hw *sf, struct mISDN_ctrl_req *cq)
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switch (cq->op) {
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case MISDN_CTRL_GETOP:
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cq->op = MISDN_CTRL_LOOP;
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cq->op = MISDN_CTRL_LOOP | MISDN_CTRL_L1_TIMER3;
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break;
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case MISDN_CTRL_LOOP:
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/* cq->channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */
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@ -234,6 +234,9 @@ channel_ctrl(struct sfax_hw *sf, struct mISDN_ctrl_req *cq)
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}
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ret = sf->isac.ctrl(&sf->isac, HW_TESTLOOP, cq->channel);
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break;
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case MISDN_CTRL_L1_TIMER3:
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ret = sf->isac.ctrl(&sf->isac, HW_TIMER3_VALUE, cq->p1);
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break;
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default:
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pr_info("%s: unknown Op %x\n", sf->name, cq->op);
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ret = -EINVAL;
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@ -1035,7 +1035,10 @@ channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq)
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switch (cq->op) {
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case MISDN_CTRL_GETOP:
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cq->op = 0;
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cq->op = MISDN_CTRL_L1_TIMER3;
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break;
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case MISDN_CTRL_L1_TIMER3:
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ret = l1_event(card->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff));
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break;
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default:
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pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op);
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@ -30,11 +30,12 @@ struct layer1 {
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struct FsmInst l1m;
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struct FsmTimer timer;
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int delay;
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int t3_value;
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struct dchannel *dch;
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dchannel_l1callback *dcb;
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};
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#define TIMER3_VALUE 7000
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#define TIMER3_DEFAULT_VALUE 7000
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static
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struct Fsm l1fsm_s = {NULL, 0, 0, NULL, NULL};
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@ -233,7 +234,7 @@ l1_activate_s(struct FsmInst *fi, int event, void *arg)
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{
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struct layer1 *l1 = fi->userdata;
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mISDN_FsmRestartTimer(&l1->timer, TIMER3_VALUE, EV_TIMER3, NULL, 2);
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mISDN_FsmRestartTimer(&l1->timer, l1->t3_value, EV_TIMER3, NULL, 2);
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test_and_set_bit(FLG_L1_T3RUN, &l1->Flags);
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l1->dcb(l1->dch, HW_RESET_REQ);
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}
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@ -356,6 +357,16 @@ l1_event(struct layer1 *l1, u_int event)
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release_l1(l1);
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break;
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default:
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if ((event & ~HW_TIMER3_VMASK) == HW_TIMER3_VALUE) {
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int val = event & HW_TIMER3_VMASK;
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if (val < 5)
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val = 5;
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if (val > 30)
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val = 30;
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l1->t3_value = val;
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break;
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}
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if (*debug & DEBUG_L1)
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printk(KERN_DEBUG "%s %x unhandled\n",
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__func__, event);
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@ -377,6 +388,7 @@ create_l1(struct dchannel *dch, dchannel_l1callback *dcb) {
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nl1->l1m.fsm = &l1fsm_s;
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nl1->l1m.state = ST_L1_F3;
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nl1->Flags = 0;
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nl1->t3_value = TIMER3_DEFAULT_VALUE;
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nl1->l1m.debug = *debug & DEBUG_L1_FSM;
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nl1->l1m.userdata = nl1;
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nl1->l1m.userint = 0;
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@ -135,6 +135,9 @@ extern int create_l1(struct dchannel *, dchannel_l1callback *);
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#define HW_TESTRX_RAW 0x9602
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#define HW_TESTRX_HDLC 0x9702
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#define HW_TESTRX_OFF 0x9802
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#define HW_TIMER3_IND 0x9902
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#define HW_TIMER3_VALUE 0x9a00
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#define HW_TIMER3_VMASK 0x00FF
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struct layer1;
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extern int l1_event(struct layer1 *, u_int);
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@ -37,7 +37,7 @@
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*/
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#define MISDN_MAJOR_VERSION 1
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#define MISDN_MINOR_VERSION 1
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#define MISDN_RELEASE 26
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#define MISDN_RELEASE 27
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/* primitives for information exchange
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* generell format
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@ -372,6 +372,7 @@ clear_channelmap(u_int nr, u_char *map)
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#define MISDN_CTRL_RX_OFF 0x0100
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#define MISDN_CTRL_FILL_EMPTY 0x0200
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#define MISDN_CTRL_GETPEER 0x0400
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#define MISDN_CTRL_L1_TIMER3 0x0800
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#define MISDN_CTRL_HW_FEATURES_OP 0x2000
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#define MISDN_CTRL_HW_FEATURES 0x2001
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#define MISDN_CTRL_HFC_OP 0x4000
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