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drm/i915: Add GPGPU_THREADS_DISPATCHED to the register whitelist
This will allow us to read the number of dispatched compute threads for GL_ARB_pipeline_statistics_query. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Cc: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -405,6 +405,7 @@ static const struct drm_i915_cmd_table hsw_blt_ring_cmds[] = {
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#define REG64(addr) (addr), (addr + sizeof(u32))
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static const u32 gen7_render_regs[] = {
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REG64(GPGPU_THREADS_DISPATCHED),
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REG64(HS_INVOCATION_COUNT),
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REG64(DS_INVOCATION_COUNT),
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REG64(IA_VERTICES_COUNT),
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@ -1153,6 +1154,7 @@ int i915_cmd_parser_get_version(void)
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* hardware parsing enabled (so does not allow new use cases).
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* 2. Allow access to the MI_PREDICATE_SRC0 and
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* MI_PREDICATE_SRC1 registers.
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* 3. Allow access to the GPGPU_THREADS_DISPATCHED register.
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*/
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return 2;
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return 3;
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}
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@ -463,17 +463,18 @@
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*/
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#define BCS_SWCTRL 0x22200
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#define HS_INVOCATION_COUNT 0x2300
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#define DS_INVOCATION_COUNT 0x2308
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#define IA_VERTICES_COUNT 0x2310
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#define IA_PRIMITIVES_COUNT 0x2318
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#define VS_INVOCATION_COUNT 0x2320
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#define GS_INVOCATION_COUNT 0x2328
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#define GS_PRIMITIVES_COUNT 0x2330
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#define CL_INVOCATION_COUNT 0x2338
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#define CL_PRIMITIVES_COUNT 0x2340
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#define PS_INVOCATION_COUNT 0x2348
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#define PS_DEPTH_COUNT 0x2350
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#define GPGPU_THREADS_DISPATCHED 0x2290
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#define HS_INVOCATION_COUNT 0x2300
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#define DS_INVOCATION_COUNT 0x2308
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#define IA_VERTICES_COUNT 0x2310
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#define IA_PRIMITIVES_COUNT 0x2318
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#define VS_INVOCATION_COUNT 0x2320
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#define GS_INVOCATION_COUNT 0x2328
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#define GS_PRIMITIVES_COUNT 0x2330
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#define CL_INVOCATION_COUNT 0x2338
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#define CL_PRIMITIVES_COUNT 0x2340
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#define PS_INVOCATION_COUNT 0x2348
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#define PS_DEPTH_COUNT 0x2350
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/* There are the 4 64-bit counter registers, one for each stream output */
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#define GEN7_SO_NUM_PRIMS_WRITTEN(n) (0x5200 + (n) * 8)
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