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OMAPDSS: DISPC: fix 64 bit issue in 5-tap
The DISPC driver uses 64 bit arithmetic to calculate the required clock rate for scaling. The code does not seem to work correctly, and instead calculates with 32 bit numbers, giving wrong result. Fix the code by typecasting values to u64 first, so that the calculations do happen in 64 bits. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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@ -2166,7 +2166,7 @@ static unsigned long calc_core_clk_five_taps(unsigned long pclk,
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if (height > out_height) {
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unsigned int ppl = mgr_timings->x_res;
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tmp = pclk * height * out_width;
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tmp = (u64)pclk * height * out_width;
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do_div(tmp, 2 * out_height * ppl);
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core_clk = tmp;
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@ -2174,14 +2174,14 @@ static unsigned long calc_core_clk_five_taps(unsigned long pclk,
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if (ppl == out_width)
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return 0;
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tmp = pclk * (height - 2 * out_height) * out_width;
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tmp = (u64)pclk * (height - 2 * out_height) * out_width;
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do_div(tmp, 2 * out_height * (ppl - out_width));
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core_clk = max_t(u32, core_clk, tmp);
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}
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}
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if (width > out_width) {
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tmp = pclk * width;
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tmp = (u64)pclk * width;
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do_div(tmp, out_width);
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core_clk = max_t(u32, core_clk, tmp);
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