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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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[PATCH] skge: remove Yukon2 related special cases
Remove the bits and pieces added relating to Yukon II chipset. The Yukon 2 will be in a separate driver. Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
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@ -205,9 +205,6 @@ static int skge_get_settings(struct net_device *dev,
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if (hw->chip_id == CHIP_ID_YUKON)
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ecmd->supported &= ~SUPPORTED_1000baseT_Half;
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else if (hw->chip_id == CHIP_ID_YUKON_FE)
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ecmd->supported &= ~(SUPPORTED_1000baseT_Half
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| SUPPORTED_1000baseT_Full);
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}
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ecmd->port = PORT_TP;
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@ -248,9 +245,6 @@ static u32 skge_modes(const struct skge_hw *hw)
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modes &= ~ADVERTISED_1000baseT_Half;
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break;
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case CHIP_ID_YUKON_FE:
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modes &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full);
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break;
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}
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} else {
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modes |= ADVERTISED_FIBRE;
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@ -270,8 +264,6 @@ static int skge_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
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} else {
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switch (ecmd->speed) {
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case SPEED_1000:
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if (hw->chip_id == CHIP_ID_YUKON_FE)
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return -EINVAL;
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break;
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case SPEED_100:
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case SPEED_10:
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@ -540,8 +532,6 @@ static inline u32 hwkhz(const struct skge_hw *hw)
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{
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if (hw->chip_id == CHIP_ID_GENESIS)
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return 53215; /* or: 53.125 MHz */
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else if (hw->chip_id == CHIP_ID_YUKON_EC)
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return 125000; /* or: 125.000 MHz */
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else
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return 78215; /* or: 78.125 MHz */
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}
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@ -1598,11 +1588,7 @@ static void yukon_init(struct skge_hw *hw, int port)
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PHY_M_EC_MAC_S_MSK);
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ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
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/* on PHY 88E1111 there is a change for downshift control */
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if (hw->chip_id == CHIP_ID_YUKON_EC)
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ectrl |= PHY_M_EC_M_DSC_2(0) | PHY_M_EC_DOWN_S_ENA;
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else
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ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
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ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
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gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
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}
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@ -1688,8 +1674,7 @@ static void yukon_init(struct skge_hw *hw, int port)
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ctrl |= PHY_CT_RESET;
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}
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if (hw->chip_id != CHIP_ID_YUKON_FE)
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gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
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gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
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gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
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gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
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@ -1698,22 +1683,10 @@ static void yukon_init(struct skge_hw *hw, int port)
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ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
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ledover = 0;
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if (hw->chip_id == CHIP_ID_YUKON_FE) {
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/* on 88E3082 these bits are at 11..9 (shifted left) */
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ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
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ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
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gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR,
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((gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR)
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& ~PHY_M_FELP_LED1_MSK)
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| PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL)));
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} else {
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/* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
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ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
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/* turn off the Rx LED (LED_RX) */
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ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
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}
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/* turn off the Rx LED (LED_RX) */
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ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
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/* disable blink mode (LED_DUPLEX) on collisions */
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ctrl |= PHY_M_LEDC_DP_CTRL;
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@ -1928,9 +1901,6 @@ static void yukon_mac_intr(struct skge_hw *hw, int port)
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static u16 yukon_speed(const struct skge_hw *hw, u16 aux)
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{
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if (hw->chip_id == CHIP_ID_YUKON_FE)
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return (aux & PHY_M_PS_SPEED_100) ? SPEED_100 : SPEED_10;
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switch (aux & PHY_M_PS_SPEED_MSK) {
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case PHY_M_PS_SPEED_1000:
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return SPEED_1000;
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@ -1975,8 +1945,7 @@ static void yukon_link_down(struct skge_port *skge)
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gm_phy_read(hw, port, GM_GP_CTRL)
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& ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA));
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if (hw->chip_id != CHIP_ID_YUKON_FE &&
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skge->flow_control == FLOW_MODE_REM_SEND) {
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if (skge->flow_control == FLOW_MODE_REM_SEND) {
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/* restore Asymmetric Pause bit */
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gm_phy_write(hw, port, PHY_MARV_AUNE_ADV,
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gm_phy_read(hw, port,
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@ -2009,9 +1978,7 @@ static void yukon_phy_intr(struct skge_port *skge)
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goto failed;
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}
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if (!(hw->chip_id == CHIP_ID_YUKON_FE || hw->chip_id == CHIP_ID_YUKON_EC)
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&& (gm_phy_read(hw, port, PHY_MARV_1000T_STAT)
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& PHY_B_1000S_MSF)) {
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if (gm_phy_read(hw, port, PHY_MARV_1000T_STAT) & PHY_B_1000S_MSF) {
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reason = "master/slave fault";
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goto failed;
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}
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@ -2025,10 +1992,6 @@ static void yukon_phy_intr(struct skge_port *skge)
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? DUPLEX_FULL : DUPLEX_HALF;
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skge->speed = yukon_speed(hw, phystat);
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/* Tx & Rx Pause Enabled bits are at 9..8 */
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if (hw->chip_id == CHIP_ID_YUKON_XL)
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phystat >>= 6;
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/* We are using IEEE 802.3z/D5.0 Table 37-4 */
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switch (phystat & PHY_M_PS_PAUSE_MSK) {
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case PHY_M_PS_PAUSE_MSK:
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@ -2875,9 +2838,6 @@ static const struct {
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{ CHIP_ID_YUKON, "Yukon" },
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{ CHIP_ID_YUKON_LITE, "Yukon-Lite"},
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{ CHIP_ID_YUKON_LP, "Yukon-LP"},
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{ CHIP_ID_YUKON_XL, "Yukon-2 XL"},
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{ CHIP_ID_YUKON_EC, "YUKON-2 EC"},
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{ CHIP_ID_YUKON_FE, "YUKON-2 FE"},
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};
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static const char *skge_board_name(const struct skge_hw *hw)
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