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r8169: replace rtl_w0w1_phy

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Replace rtl_w0w1_phy with phylib functions.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Heiner Kallweit 2020-01-09 20:31:10 +01:00 committed by David S. Miller
parent 11b3bedeb0
commit c4d76995f5
1 changed files with 12 additions and 22 deletions
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34
drivers/net/ethernet/realtek/r8169_main.c
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@ -1081,14 +1081,6 @@ static int rtl_readphy(struct rtl8169_private *tp, int location)
}
}
static void rtl_w0w1_phy(struct rtl8169_private *tp, int reg_addr, int p, int m)
{
int val;
val = rtl_readphy(tp, reg_addr);
rtl_writephy(tp, reg_addr, (val & ~m) | p);
}
static void r8168d_modify_extpage(struct phy_device *phydev, int extpage,
int reg, u16 mask, u16 val)
{
@ -2702,8 +2694,8 @@ static void rtl8168d_1_hw_phy_config(struct rtl8169_private *tp,
* Fine Tune Switching regulator parameter
*/
rtl_writephy(tp, 0x1f, 0x0002);
rtl_w0w1_phy(tp, 0x0b, 0x0010, 0x00ef);
rtl_w0w1_phy(tp, 0x0c, 0xa200, 0x5d00);
phy_modify(phydev, 0x0b, 0x00ef, 0x0010);
phy_modify(phydev, 0x0c, 0x5d00, 0xa200);
if (rtl8168d_efuse_read(tp, 0x01) == 0xb1) {
int val;
@ -2737,8 +2729,8 @@ static void rtl8168d_1_hw_phy_config(struct rtl8169_private *tp,
/* Fine tune PLL performance */
rtl_writephy(tp, 0x1f, 0x0002);
rtl_w0w1_phy(tp, 0x02, 0x0100, 0x0600);
rtl_w0w1_phy(tp, 0x03, 0x0000, 0xe000);
phy_modify(phydev, 0x02, 0x0600, 0x0100);
phy_clear_bits(phydev, 0x03, 0xe000);
rtl_writephy(tp, 0x1f, 0x0000);
rtl8168d_apply_firmware_cond(tp, 0xbf00);
@ -2775,8 +2767,8 @@ static void rtl8168d_2_hw_phy_config(struct rtl8169_private *tp,
/* Fine tune PLL performance */
rtl_writephy(tp, 0x1f, 0x0002);
rtl_w0w1_phy(tp, 0x02, 0x0100, 0x0600);
rtl_w0w1_phy(tp, 0x03, 0x0000, 0xe000);
phy_modify(phydev, 0x02, 0x0600, 0x0100);
phy_clear_bits(phydev, 0x03, 0xe000);
rtl_writephy(tp, 0x1f, 0x0000);
/* Switching regulator Slew rate */
@ -2929,7 +2921,7 @@ static void rtl8168e_2_hw_phy_config(struct rtl8169_private *tp,
/* For 4-corner performance improve */
rtl_writephy(tp, 0x1f, 0x0005);
rtl_writephy(tp, 0x05, 0x8b80);
rtl_w0w1_phy(tp, 0x17, 0x0006, 0x0000);
phy_set_bits(phydev, 0x17, 0x0006);
rtl_writephy(tp, 0x1f, 0x0000);
/* PHY auto speed down */
@ -2946,12 +2938,10 @@ static void rtl8168e_2_hw_phy_config(struct rtl8169_private *tp,
/* Green feature */
rtl_writephy(tp, 0x1f, 0x0003);
rtl_w0w1_phy(tp, 0x19, 0x0001, 0x0000);
rtl_w0w1_phy(tp, 0x10, 0x0400, 0x0000);
rtl_writephy(tp, 0x1f, 0x0000);
rtl_writephy(tp, 0x1f, 0x0005);
rtl_w0w1_phy(tp, 0x01, 0x0100, 0x0000);
phy_set_bits(phydev, 0x19, BIT(0));
phy_set_bits(phydev, 0x10, BIT(10));
rtl_writephy(tp, 0x1f, 0x0000);
phy_modify_paged(phydev, 0x0005, 0x01, 0, BIT(8));
}
static void rtl8168f_hw_phy_config(struct rtl8169_private *tp,
@ -3047,8 +3037,8 @@ static void rtl8411_hw_phy_config(struct rtl8169_private *tp,
/* Green feature */
rtl_writephy(tp, 0x1f, 0x0003);
rtl_w0w1_phy(tp, 0x19, 0x0000, 0x0001);
rtl_w0w1_phy(tp, 0x10, 0x0000, 0x0400);
phy_clear_bits(phydev, 0x19, BIT(0));
phy_clear_bits(phydev, 0x10, BIT(10));
rtl_writephy(tp, 0x1f, 0x0000);
}