mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-02-24 04:35:14 +07:00
Merge branch 'pci/virtualization' into next
* pci/virtualization: PCI: Add ACS quirk for Qualcomm QDF2400 and QDF2432
This commit is contained in:
commit
c4d052ce97
@ -4159,6 +4159,26 @@ static int pci_quirk_intel_pch_acs(struct pci_dev *dev, u16 acs_flags)
|
|||||||
return acs_flags & ~flags ? 0 : 1;
|
return acs_flags & ~flags ? 0 : 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* These QCOM root ports do provide ACS-like features to disable peer
|
||||||
|
* transactions and validate bus numbers in requests, but do not provide an
|
||||||
|
* actual PCIe ACS capability. Hardware supports source validation but it
|
||||||
|
* will report the issue as Completer Abort instead of ACS Violation.
|
||||||
|
* Hardware doesn't support peer-to-peer and each root port is a root
|
||||||
|
* complex with unique segment numbers. It is not possible for one root
|
||||||
|
* port to pass traffic to another root port. All PCIe transactions are
|
||||||
|
* terminated inside the root port.
|
||||||
|
*/
|
||||||
|
static int pci_quirk_qcom_rp_acs(struct pci_dev *dev, u16 acs_flags)
|
||||||
|
{
|
||||||
|
u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV);
|
||||||
|
int ret = acs_flags & ~flags ? 0 : 1;
|
||||||
|
|
||||||
|
dev_info(&dev->dev, "Using QCOM ACS Quirk (%d)\n", ret);
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Sunrise Point PCH root ports implement ACS, but unfortunately as shown in
|
* Sunrise Point PCH root ports implement ACS, but unfortunately as shown in
|
||||||
* the datasheet (Intel 100 Series Chipset Family PCH Datasheet, Vol. 2,
|
* the datasheet (Intel 100 Series Chipset Family PCH Datasheet, Vol. 2,
|
||||||
@ -4315,6 +4335,9 @@ static const struct pci_dev_acs_enabled {
|
|||||||
/* I219 */
|
/* I219 */
|
||||||
{ PCI_VENDOR_ID_INTEL, 0x15b7, pci_quirk_mf_endpoint_acs },
|
{ PCI_VENDOR_ID_INTEL, 0x15b7, pci_quirk_mf_endpoint_acs },
|
||||||
{ PCI_VENDOR_ID_INTEL, 0x15b8, pci_quirk_mf_endpoint_acs },
|
{ PCI_VENDOR_ID_INTEL, 0x15b8, pci_quirk_mf_endpoint_acs },
|
||||||
|
/* QCOM QDF2xxx root ports */
|
||||||
|
{ 0x17cb, 0x400, pci_quirk_qcom_rp_acs },
|
||||||
|
{ 0x17cb, 0x401, pci_quirk_qcom_rp_acs },
|
||||||
/* Intel PCH root ports */
|
/* Intel PCH root ports */
|
||||||
{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs },
|
{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs },
|
||||||
{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_spt_pch_acs },
|
{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_spt_pch_acs },
|
||||||
|
Loading…
Reference in New Issue
Block a user