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msm: iomap: Addresses and IRQs for 2nd GFX core IOMMU

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Add register addresses and IRQ numbers for the IOMMU used
for the second 2D graphics core.

Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
This commit is contained in:
Stepan Moskovchenko 2010-11-12 19:29:48 -08:00 committed by Daniel Walker
parent 23513c3b39
commit c4bd2eebee
2 changed files with 9 additions and 1 deletions
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7
arch/arm/mach-msm/include/mach/irqs-8x60.h
View File

@ -237,7 +237,12 @@
#define GSBI11_QUP_IRQ (GIC_SPI_START + 194)
#define INT_UART12DM_IRQ (GIC_SPI_START + 195)
#define GSBI12_QUP_IRQ (GIC_SPI_START + 196)
/*SPI 197 to 216 arent used in 8x60*/
/*SPI 197 to 209 arent used in 8x60*/
#define SMMU_GFX2D1_CB_SC_SECURE_IRQ (GIC_SPI_START + 210)
#define SMMU_GFX2D1_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 211)
/*SPI 212 to 216 arent used in 8x60*/
#define SMPSS_SPARE_1 (GIC_SPI_START + 217)
#define SMPSS_SPARE_2 (GIC_SPI_START + 218)
#define SMPSS_SPARE_3 (GIC_SPI_START + 219)

3
arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
View File

@ -98,4 +98,7 @@
#define MSM_IOMMU_GFX2D0_PHYS 0x07D00000
#define MSM_IOMMU_GFX2D0_SIZE SZ_1M
#define MSM_IOMMU_GFX2D1_PHYS 0x07E00000
#define MSM_IOMMU_GFX2D1_SIZE SZ_1M
#endif