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drm/amdgpu: Cleanup 2 compiler warnings
These 2 variables are unused now, so remove their references.
Fixes: e4ae0fc
drm/amdgpu: implement gfx8 post_soft_reset
Fixes: 5e01c09 drm/amdgpu/gfx_v8_0: Reorder the gfx, kiq and kcq rings
test sequence
Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -4233,7 +4233,6 @@ static int gfx_v8_0_cp_gfx_resume(struct amdgpu_device *adev)
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u32 tmp;
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u32 rb_bufsz;
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u64 rb_addr, rptr_addr, wptr_gpu_addr;
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int r;
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/* Set the write pointer delay */
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WREG32(mmCP_RB_WPTR_DELAY, 0);
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@ -5075,7 +5074,6 @@ static int gfx_v8_0_post_soft_reset(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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u32 grbm_soft_reset = 0;
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struct amdgpu_ring *ring;
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if ((!adev->gfx.grbm_soft_reset) &&
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(!adev->gfx.srbm_soft_reset))
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