mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 08:36:43 +07:00
Second Round of Renesas ARM64 Based SoC DT Updates for v4.12
Corrections: * r8a7795: Correct SATA device size to 2MiB for r8a7795 SoC Cleanup: * Drop _clk suffix from X12 clock node name for r8a7795 SoC Enhancements: * Add reset control properties for r8a779[56] -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJY569jAAoJENfPZGlqN0++4kIP/isnugtJf5N1dRc82mxIDd3e 8wAKOI3+gXK6dQPr5HP6nD7YgUWWgj+SKX8G8d/VRxWkBHKVdOBmSq6h/nkY2hg6 XcnbRu+dIB2fthXW4vdvnj1j5gIz1b0Y8aXL5cZSX+5nxeZPfdiZt0n7YSKU2Bg5 wlHXUWhkXYDZfz9wqRmqU2mjkbh5dwqHHYMLcrwazVhvS68XdJvAwUKzrtCfndKv n727ypPZP5QX569r4Ub1AtY3J3y4F4aMl7eWbh8ZxTJoMYrtLhmq7gms1thmTp77 xVeHFHCDEThREY7NgubisI9oyVEssqkB/8cDbCo6IPvDNNuJ1M5FAfAHNcBQ+2Wg 3PiKDoVXkBL7zuQIl0JjiWPEBKWZkEnictXX+1CsgHZPLnQFAKncYilpvX3jz+Gq 2eETERdgNbx5pEej/mZsyLVFe6TQ5GoSz74YQQkS4KajfIGZmYAgUXL0sIlo3MKi X1jhQy4Ux41nG+arJPYyx8R+Db9qrDhs43npfe+y5i9D/JbIxASDE4J0RypU993x H6SEUMDoEG+1dcR4Ez7rCeWm8CG9eVDks0oMZlRaOXbqvPBsy43YvuiYdTEE3x+X HSJubtalb1pDqe4Fi0DmuOU/2kQf74/mBmD971sjBNupT61e4Q3rW8bwz5pO+45Y lgLStN9v8ptgyMr+hU4o =HWqJ -----END PGP SIGNATURE----- Merge tag 'renesas-arm64-dt2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64 Second Round of Renesas ARM64 Based SoC DT Updates for v4.12 Corrections: * r8a7795: Correct SATA device size to 2MiB for r8a7795 SoC Cleanup: * Drop _clk suffix from X12 clock node name for r8a7795 SoC Enhancements: * Add reset control properties for r8a779[56] * tag 'renesas-arm64-dt2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: r8a7795: salvator-x: Drop _clk suffix from X12 clock node name arm64: dts: r8a7796: Add reset control properties arm64: dts: r8a7795: Add reset control properties arm64: dts: r8a7795: Correct SATA device size to 2MiB Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
c3acc32d6f
@ -56,7 +56,7 @@ memory@48000000 {
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reg = <0x0 0x48000000 0x0 0x38000000>;
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};
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x12_clk: x12_clk {
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x12_clk: x12 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24576000>;
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@ -204,6 +204,7 @@ gic: interrupt-controller@f1010000 {
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clocks = <&cpg CPG_MOD 408>;
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clock-names = "clk";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 408>;
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};
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wdt0: watchdog@e6020000 {
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@ -211,6 +212,7 @@ wdt0: watchdog@e6020000 {
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reg = <0 0xe6020000 0 0x0c>;
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clocks = <&cpg CPG_MOD 402>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 402>;
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status = "disabled";
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};
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@ -226,6 +228,7 @@ gpio0: gpio@e6050000 {
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interrupt-controller;
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clocks = <&cpg CPG_MOD 912>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 912>;
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};
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gpio1: gpio@e6051000 {
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@ -240,6 +243,7 @@ gpio1: gpio@e6051000 {
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interrupt-controller;
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clocks = <&cpg CPG_MOD 911>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 911>;
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};
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gpio2: gpio@e6052000 {
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@ -254,6 +258,7 @@ gpio2: gpio@e6052000 {
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interrupt-controller;
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clocks = <&cpg CPG_MOD 910>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 910>;
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};
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gpio3: gpio@e6053000 {
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@ -268,6 +273,7 @@ gpio3: gpio@e6053000 {
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interrupt-controller;
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clocks = <&cpg CPG_MOD 909>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 909>;
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};
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gpio4: gpio@e6054000 {
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@ -282,6 +288,7 @@ gpio4: gpio@e6054000 {
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interrupt-controller;
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clocks = <&cpg CPG_MOD 908>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 908>;
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};
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gpio5: gpio@e6055000 {
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@ -296,6 +303,7 @@ gpio5: gpio@e6055000 {
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interrupt-controller;
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clocks = <&cpg CPG_MOD 907>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 907>;
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};
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gpio6: gpio@e6055400 {
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@ -310,6 +318,7 @@ gpio6: gpio@e6055400 {
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interrupt-controller;
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clocks = <&cpg CPG_MOD 906>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 906>;
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};
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gpio7: gpio@e6055800 {
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@ -324,6 +333,7 @@ gpio7: gpio@e6055800 {
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interrupt-controller;
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clocks = <&cpg CPG_MOD 905>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 905>;
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};
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pmu_a57 {
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@ -369,6 +379,7 @@ cpg: clock-controller@e6150000 {
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clock-names = "extal", "extalr";
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#clock-cells = <2>;
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#power-domain-cells = <0>;
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#reset-cells = <1>;
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};
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rst: reset-controller@e6160000 {
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@ -405,6 +416,7 @@ GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 407>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 407>;
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};
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dmac0: dma-controller@e6700000 {
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@ -436,6 +448,7 @@ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
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clocks = <&cpg CPG_MOD 219>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 219>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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@ -469,6 +482,7 @@ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
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clocks = <&cpg CPG_MOD 218>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 218>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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@ -502,6 +516,7 @@ GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
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clocks = <&cpg CPG_MOD 217>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 217>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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@ -535,6 +550,7 @@ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
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clocks = <&cpg CPG_MOD 502>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 502>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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@ -568,6 +584,7 @@ GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
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clocks = <&cpg CPG_MOD 501>;
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clock-names = "fck";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 501>;
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#dma-cells = <1>;
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dma-channels = <16>;
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};
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@ -610,6 +627,7 @@ avb: ethernet@e6800000 {
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"ch24";
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clocks = <&cpg CPG_MOD 812>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 812>;
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phy-mode = "rgmii-txid";
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#address-cells = <1>;
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#size-cells = <0>;
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@ -628,6 +646,7 @@ can0: can@e6c30000 {
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assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
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assigned-clock-rates = <40000000>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 916>;
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status = "disabled";
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};
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@ -643,6 +662,7 @@ can1: can@e6c38000 {
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assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
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assigned-clock-rates = <40000000>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 915>;
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status = "disabled";
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};
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@ -659,6 +679,7 @@ canfd: can@e66c0000 {
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assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
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assigned-clock-rates = <40000000>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 914>;
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status = "disabled";
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channel0 {
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@ -683,6 +704,7 @@ hscif0: serial@e6540000 {
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dmas = <&dmac1 0x31>, <&dmac1 0x30>;
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dma-names = "tx", "rx";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 520>;
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status = "disabled";
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};
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@ -699,6 +721,7 @@ hscif1: serial@e6550000 {
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dmas = <&dmac1 0x33>, <&dmac1 0x32>;
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dma-names = "tx", "rx";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 519>;
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status = "disabled";
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};
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@ -715,6 +738,7 @@ hscif2: serial@e6560000 {
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dmas = <&dmac1 0x35>, <&dmac1 0x34>;
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dma-names = "tx", "rx";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 518>;
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status = "disabled";
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};
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@ -731,6 +755,7 @@ hscif3: serial@e66a0000 {
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dmas = <&dmac0 0x37>, <&dmac0 0x36>;
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dma-names = "tx", "rx";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 517>;
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status = "disabled";
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};
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@ -747,6 +772,7 @@ hscif4: serial@e66b0000 {
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dmas = <&dmac0 0x39>, <&dmac0 0x38>;
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dma-names = "tx", "rx";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 516>;
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status = "disabled";
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};
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@ -762,6 +788,7 @@ scif0: serial@e6e60000 {
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dmas = <&dmac1 0x51>, <&dmac1 0x50>;
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dma-names = "tx", "rx";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 207>;
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status = "disabled";
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};
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@ -777,6 +804,7 @@ scif1: serial@e6e68000 {
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dmas = <&dmac1 0x53>, <&dmac1 0x52>;
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dma-names = "tx", "rx";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 206>;
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status = "disabled";
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};
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@ -792,6 +820,7 @@ scif2: serial@e6e88000 {
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dmas = <&dmac1 0x13>, <&dmac1 0x12>;
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dma-names = "tx", "rx";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 310>;
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status = "disabled";
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};
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@ -807,6 +836,7 @@ scif3: serial@e6c50000 {
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dmas = <&dmac0 0x57>, <&dmac0 0x56>;
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dma-names = "tx", "rx";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 204>;
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status = "disabled";
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};
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@ -822,6 +852,7 @@ scif4: serial@e6c40000 {
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dmas = <&dmac0 0x59>, <&dmac0 0x58>;
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dma-names = "tx", "rx";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 203>;
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status = "disabled";
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};
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@ -837,6 +868,7 @@ scif5: serial@e6f30000 {
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dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
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dma-names = "tx", "rx";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 202>;
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status = "disabled";
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};
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@ -850,6 +882,7 @@ i2c_dvfs: i2c@e60b0000 {
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interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 926>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 926>;
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status = "disabled";
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};
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@ -862,6 +895,7 @@ i2c0: i2c@e6500000 {
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interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 931>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 931>;
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dmas = <&dmac1 0x91>, <&dmac1 0x90>;
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dma-names = "tx", "rx";
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i2c-scl-internal-delay-ns = <110>;
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@ -877,6 +911,7 @@ i2c1: i2c@e6508000 {
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interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 930>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 930>;
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dmas = <&dmac1 0x93>, <&dmac1 0x92>;
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dma-names = "tx", "rx";
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i2c-scl-internal-delay-ns = <6>;
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@ -892,6 +927,7 @@ i2c2: i2c@e6510000 {
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interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 929>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 929>;
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dmas = <&dmac1 0x95>, <&dmac1 0x94>;
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dma-names = "tx", "rx";
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i2c-scl-internal-delay-ns = <6>;
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@ -907,6 +943,7 @@ i2c3: i2c@e66d0000 {
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interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 928>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 928>;
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dmas = <&dmac0 0x97>, <&dmac0 0x96>;
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dma-names = "tx", "rx";
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i2c-scl-internal-delay-ns = <110>;
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@ -922,6 +959,7 @@ i2c4: i2c@e66d8000 {
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interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 927>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 927>;
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dmas = <&dmac0 0x99>, <&dmac0 0x98>;
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dma-names = "tx", "rx";
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i2c-scl-internal-delay-ns = <110>;
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@ -937,6 +975,7 @@ i2c5: i2c@e66e0000 {
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interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 919>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 919>;
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dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
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dma-names = "tx", "rx";
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i2c-scl-internal-delay-ns = <110>;
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@ -952,6 +991,7 @@ i2c6: i2c@e66e8000 {
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interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 918>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
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resets = <&cpg 918>;
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dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
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dma-names = "tx", "rx";
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i2c-scl-internal-delay-ns = <6>;
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@ -963,6 +1003,7 @@ pwm0: pwm@e6e30000 {
|
||||
reg = <0 0xe6e30000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
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@ -972,6 +1013,7 @@ pwm1: pwm@e6e31000 {
|
||||
reg = <0 0xe6e31000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -981,6 +1023,7 @@ pwm2: pwm@e6e32000 {
|
||||
reg = <0 0xe6e32000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -990,6 +1033,7 @@ pwm3: pwm@e6e33000 {
|
||||
reg = <0 0xe6e33000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -999,6 +1043,7 @@ pwm4: pwm@e6e34000 {
|
||||
reg = <0 0xe6e34000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1008,6 +1053,7 @@ pwm5: pwm@e6e35000 {
|
||||
reg = <0 0xe6e35000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1017,6 +1063,7 @@ pwm6: pwm@e6e36000 {
|
||||
reg = <0 0xe6e36000 0 0x8>;
|
||||
clocks = <&cpg CPG_MOD 523>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 523>;
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1209,10 +1256,11 @@ ssi9: ssi-9 {
|
||||
|
||||
sata: sata@ee300000 {
|
||||
compatible = "renesas,sata-r8a7795";
|
||||
reg = <0 0xee300000 0 0x1fff>;
|
||||
reg = <0 0xee300000 0 0x200000>;
|
||||
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 815>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 815>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1222,6 +1270,7 @@ xhci0: usb@ee000000 {
|
||||
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 328>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 328>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1231,6 +1280,7 @@ xhci1: usb@ee0400000 {
|
||||
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 327>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 327>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1243,6 +1293,7 @@ usb_dmac0: dma-controller@e65a0000 {
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 330>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 330>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <2>;
|
||||
};
|
||||
@ -1256,6 +1307,7 @@ usb_dmac1: dma-controller@e65b0000 {
|
||||
interrupt-names = "ch0", "ch1";
|
||||
clocks = <&cpg CPG_MOD 331>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 331>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <2>;
|
||||
};
|
||||
@ -1267,6 +1319,7 @@ sdhi0: sd@ee100000 {
|
||||
clocks = <&cpg CPG_MOD 314>;
|
||||
max-frequency = <200000000>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 314>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1277,6 +1330,7 @@ sdhi1: sd@ee120000 {
|
||||
clocks = <&cpg CPG_MOD 313>;
|
||||
max-frequency = <200000000>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 313>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1287,6 +1341,7 @@ sdhi2: sd@ee140000 {
|
||||
clocks = <&cpg CPG_MOD 312>;
|
||||
max-frequency = <200000000>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 312>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1297,6 +1352,7 @@ sdhi3: sd@ee160000 {
|
||||
clocks = <&cpg CPG_MOD 311>;
|
||||
max-frequency = <200000000>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 311>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1307,6 +1363,7 @@ usb2_phy0: usb-phy@ee080200 {
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 703>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>;
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1317,6 +1374,7 @@ usb2_phy1: usb-phy@ee0a0200 {
|
||||
reg = <0 0xee0a0200 0 0x700>;
|
||||
clocks = <&cpg CPG_MOD 702>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1327,6 +1385,7 @@ usb2_phy2: usb-phy@ee0c0200 {
|
||||
reg = <0 0xee0c0200 0 0x700>;
|
||||
clocks = <&cpg CPG_MOD 701>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 701>;
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1339,6 +1398,7 @@ ehci0: usb@ee080100 {
|
||||
phys = <&usb2_phy0>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1350,6 +1410,7 @@ ehci1: usb@ee0a0100 {
|
||||
phys = <&usb2_phy1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1361,6 +1422,7 @@ ehci2: usb@ee0c0100 {
|
||||
phys = <&usb2_phy2>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 701>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1372,6 +1434,7 @@ ohci0: usb@ee080000 {
|
||||
phys = <&usb2_phy0>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 703>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1383,6 +1446,7 @@ ohci1: usb@ee0a0000 {
|
||||
phys = <&usb2_phy1>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 702>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1394,6 +1458,7 @@ ohci2: usb@ee0c0000 {
|
||||
phys = <&usb2_phy2>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 701>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1410,6 +1475,7 @@ hsusb: usb@e6590000 {
|
||||
phys = <&usb2_phy0>;
|
||||
phy-names = "usb";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 704>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1436,6 +1502,7 @@ pciec0: pcie@fe000000 {
|
||||
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
|
||||
clock-names = "pcie", "pcie_bus";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 319>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1462,6 +1529,7 @@ pciec1: pcie@ee800000 {
|
||||
clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
|
||||
clock-names = "pcie", "pcie_bus";
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 318>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -1471,6 +1539,7 @@ vspbc: vsp@fe920000 {
|
||||
interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 624>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 624>;
|
||||
|
||||
renesas,fcp = <&fcpvb1>;
|
||||
};
|
||||
@ -1480,6 +1549,7 @@ fcpvb1: fcp@fe92f000 {
|
||||
reg = <0 0xfe92f000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 606>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 606>;
|
||||
};
|
||||
|
||||
fcpf0: fcp@fe950000 {
|
||||
@ -1487,6 +1557,7 @@ fcpf0: fcp@fe950000 {
|
||||
reg = <0 0xfe950000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 615>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 615>;
|
||||
};
|
||||
|
||||
fcpf1: fcp@fe951000 {
|
||||
@ -1494,6 +1565,7 @@ fcpf1: fcp@fe951000 {
|
||||
reg = <0 0xfe951000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 614>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 614>;
|
||||
};
|
||||
|
||||
fcpf2: fcp@fe952000 {
|
||||
@ -1501,6 +1573,7 @@ fcpf2: fcp@fe952000 {
|
||||
reg = <0 0xfe952000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 613>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 613>;
|
||||
};
|
||||
|
||||
vspbd: vsp@fe960000 {
|
||||
@ -1509,6 +1582,7 @@ vspbd: vsp@fe960000 {
|
||||
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 626>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 626>;
|
||||
|
||||
renesas,fcp = <&fcpvb0>;
|
||||
};
|
||||
@ -1518,6 +1592,7 @@ fcpvb0: fcp@fe96f000 {
|
||||
reg = <0 0xfe96f000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 607>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 607>;
|
||||
};
|
||||
|
||||
vspi0: vsp@fe9a0000 {
|
||||
@ -1526,6 +1601,7 @@ vspi0: vsp@fe9a0000 {
|
||||
interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 631>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 631>;
|
||||
|
||||
renesas,fcp = <&fcpvi0>;
|
||||
};
|
||||
@ -1535,6 +1611,7 @@ fcpvi0: fcp@fe9af000 {
|
||||
reg = <0 0xfe9af000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 611>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 611>;
|
||||
};
|
||||
|
||||
vspi1: vsp@fe9b0000 {
|
||||
@ -1543,6 +1620,7 @@ vspi1: vsp@fe9b0000 {
|
||||
interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 630>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 630>;
|
||||
|
||||
renesas,fcp = <&fcpvi1>;
|
||||
};
|
||||
@ -1552,6 +1630,7 @@ fcpvi1: fcp@fe9bf000 {
|
||||
reg = <0 0xfe9bf000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 610>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 610>;
|
||||
};
|
||||
|
||||
vspi2: vsp@fe9c0000 {
|
||||
@ -1560,6 +1639,7 @@ vspi2: vsp@fe9c0000 {
|
||||
interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 629>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 629>;
|
||||
|
||||
renesas,fcp = <&fcpvi2>;
|
||||
};
|
||||
@ -1569,6 +1649,7 @@ fcpvi2: fcp@fe9cf000 {
|
||||
reg = <0 0xfe9cf000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 609>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 609>;
|
||||
};
|
||||
|
||||
vspd0: vsp@fea20000 {
|
||||
@ -1577,6 +1658,7 @@ vspd0: vsp@fea20000 {
|
||||
interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 623>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 623>;
|
||||
|
||||
renesas,fcp = <&fcpvd0>;
|
||||
};
|
||||
@ -1586,6 +1668,7 @@ fcpvd0: fcp@fea27000 {
|
||||
reg = <0 0xfea27000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 603>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 603>;
|
||||
};
|
||||
|
||||
vspd1: vsp@fea28000 {
|
||||
@ -1594,6 +1677,7 @@ vspd1: vsp@fea28000 {
|
||||
interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 622>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 622>;
|
||||
|
||||
renesas,fcp = <&fcpvd1>;
|
||||
};
|
||||
@ -1603,6 +1687,7 @@ fcpvd1: fcp@fea2f000 {
|
||||
reg = <0 0xfea2f000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 602>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 602>;
|
||||
};
|
||||
|
||||
vspd2: vsp@fea30000 {
|
||||
@ -1611,6 +1696,7 @@ vspd2: vsp@fea30000 {
|
||||
interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 621>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 621>;
|
||||
|
||||
renesas,fcp = <&fcpvd2>;
|
||||
};
|
||||
@ -1620,6 +1706,7 @@ fcpvd2: fcp@fea37000 {
|
||||
reg = <0 0xfea37000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 601>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 601>;
|
||||
};
|
||||
|
||||
vspd3: vsp@fea38000 {
|
||||
@ -1628,6 +1715,7 @@ vspd3: vsp@fea38000 {
|
||||
interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 620>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 620>;
|
||||
|
||||
renesas,fcp = <&fcpvd3>;
|
||||
};
|
||||
@ -1637,6 +1725,7 @@ fcpvd3: fcp@fea3f000 {
|
||||
reg = <0 0xfea3f000 0 0x200>;
|
||||
clocks = <&cpg CPG_MOD 600>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 600>;
|
||||
};
|
||||
|
||||
fdp1@fe940000 {
|
||||
@ -1645,6 +1734,7 @@ fdp1@fe940000 {
|
||||
interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 119>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 119>;
|
||||
renesas,fcp = <&fcpf0>;
|
||||
};
|
||||
|
||||
@ -1654,6 +1744,7 @@ fdp1@fe944000 {
|
||||
interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 118>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 118>;
|
||||
renesas,fcp = <&fcpf1>;
|
||||
};
|
||||
|
||||
@ -1663,6 +1754,7 @@ fdp1@fe948000 {
|
||||
interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 117>;
|
||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||
resets = <&cpg 117>;
|
||||
renesas,fcp = <&fcpf2>;
|
||||
};
|
||||
|
||||
@ -1722,6 +1814,7 @@ tsc: thermal@e6198000 {
|
||||
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 522>;
|
||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 522>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@ -155,6 +155,7 @@ gic: interrupt-controller@f1010000 {
|
||||
clocks = <&cpg CPG_MOD 408>;
|
||||
clock-names = "clk";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 408>;
|
||||
};
|
||||
|
||||
timer {
|
||||
@ -175,6 +176,7 @@ wdt0: watchdog@e6020000 {
|
||||
reg = <0 0xe6020000 0 0x0c>;
|
||||
clocks = <&cpg CPG_MOD 402>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 402>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -190,6 +192,7 @@ gpio0: gpio@e6050000 {
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 912>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 912>;
|
||||
};
|
||||
|
||||
gpio1: gpio@e6051000 {
|
||||
@ -204,6 +207,7 @@ gpio1: gpio@e6051000 {
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 911>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 911>;
|
||||
};
|
||||
|
||||
gpio2: gpio@e6052000 {
|
||||
@ -218,6 +222,7 @@ gpio2: gpio@e6052000 {
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 910>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 910>;
|
||||
};
|
||||
|
||||
gpio3: gpio@e6053000 {
|
||||
@ -232,6 +237,7 @@ gpio3: gpio@e6053000 {
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 909>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 909>;
|
||||
};
|
||||
|
||||
gpio4: gpio@e6054000 {
|
||||
@ -246,6 +252,7 @@ gpio4: gpio@e6054000 {
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 908>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 908>;
|
||||
};
|
||||
|
||||
gpio5: gpio@e6055000 {
|
||||
@ -260,6 +267,7 @@ gpio5: gpio@e6055000 {
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 907>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 907>;
|
||||
};
|
||||
|
||||
gpio6: gpio@e6055400 {
|
||||
@ -274,6 +282,7 @@ gpio6: gpio@e6055400 {
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 906>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 906>;
|
||||
};
|
||||
|
||||
gpio7: gpio@e6055800 {
|
||||
@ -288,6 +297,7 @@ gpio7: gpio@e6055800 {
|
||||
interrupt-controller;
|
||||
clocks = <&cpg CPG_MOD 905>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 905>;
|
||||
};
|
||||
|
||||
pfc: pin-controller@e6060000 {
|
||||
@ -322,6 +332,7 @@ cpg: clock-controller@e6150000 {
|
||||
clock-names = "extal", "extalr";
|
||||
#clock-cells = <2>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
rst: reset-controller@e6160000 {
|
||||
@ -350,6 +361,7 @@ i2c_dvfs: i2c@e60b0000 {
|
||||
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 926>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 926>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -362,6 +374,7 @@ i2c0: i2c@e6500000 {
|
||||
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 931>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 931>;
|
||||
dmas = <&dmac1 0x91>, <&dmac1 0x90>,
|
||||
<&dmac2 0x91>, <&dmac2 0x90>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
@ -378,6 +391,7 @@ i2c1: i2c@e6508000 {
|
||||
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 930>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 930>;
|
||||
dmas = <&dmac1 0x93>, <&dmac1 0x92>,
|
||||
<&dmac2 0x93>, <&dmac2 0x92>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
@ -394,6 +408,7 @@ i2c2: i2c@e6510000 {
|
||||
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 929>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 929>;
|
||||
dmas = <&dmac1 0x95>, <&dmac1 0x94>,
|
||||
<&dmac2 0x95>, <&dmac2 0x94>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
@ -410,6 +425,7 @@ i2c3: i2c@e66d0000 {
|
||||
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 928>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 928>;
|
||||
dmas = <&dmac0 0x97>, <&dmac0 0x96>;
|
||||
dma-names = "tx", "rx";
|
||||
i2c-scl-internal-delay-ns = <110>;
|
||||
@ -425,6 +441,7 @@ i2c4: i2c@e66d8000 {
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 927>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 927>;
|
||||
dmas = <&dmac0 0x99>, <&dmac0 0x98>;
|
||||
dma-names = "tx", "rx";
|
||||
i2c-scl-internal-delay-ns = <110>;
|
||||
@ -440,6 +457,7 @@ i2c5: i2c@e66e0000 {
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 919>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 919>;
|
||||
dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
|
||||
dma-names = "tx", "rx";
|
||||
i2c-scl-internal-delay-ns = <110>;
|
||||
@ -455,6 +473,7 @@ i2c6: i2c@e66e8000 {
|
||||
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 918>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 918>;
|
||||
dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
|
||||
dma-names = "tx", "rx";
|
||||
i2c-scl-internal-delay-ns = <6>;
|
||||
@ -473,6 +492,7 @@ can0: can@e6c30000 {
|
||||
assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
|
||||
assigned-clock-rates = <40000000>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 916>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -488,6 +508,7 @@ can1: can@e6c38000 {
|
||||
assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
|
||||
assigned-clock-rates = <40000000>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 915>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -504,6 +525,7 @@ canfd: can@e66c0000 {
|
||||
assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
|
||||
assigned-clock-rates = <40000000>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 914>;
|
||||
status = "disabled";
|
||||
|
||||
channel0 {
|
||||
@ -553,6 +575,7 @@ avb: ethernet@e6800000 {
|
||||
"ch24";
|
||||
clocks = <&cpg CPG_MOD 812>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 812>;
|
||||
phy-mode = "rgmii-txid";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -573,6 +596,7 @@ hscif0: serial@e6540000 {
|
||||
<&dmac2 0x31>, <&dmac2 0x30>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 520>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -590,6 +614,7 @@ hscif1: serial@e6550000 {
|
||||
<&dmac2 0x33>, <&dmac2 0x32>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 519>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -607,6 +632,7 @@ hscif2: serial@e6560000 {
|
||||
<&dmac2 0x35>, <&dmac2 0x34>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 518>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -623,6 +649,7 @@ hscif3: serial@e66a0000 {
|
||||
dmas = <&dmac0 0x37>, <&dmac0 0x36>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 517>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -639,6 +666,7 @@ hscif4: serial@e66b0000 {
|
||||
dmas = <&dmac0 0x39>, <&dmac0 0x38>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 516>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -655,6 +683,7 @@ scif0: serial@e6e60000 {
|
||||
<&dmac2 0x51>, <&dmac2 0x50>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 207>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -671,6 +700,7 @@ scif1: serial@e6e68000 {
|
||||
<&dmac2 0x53>, <&dmac2 0x52>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 206>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -684,6 +714,7 @@ scif2: serial@e6e88000 {
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 310>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -699,6 +730,7 @@ scif3: serial@e6c50000 {
|
||||
dmas = <&dmac0 0x57>, <&dmac0 0x56>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 204>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -714,6 +746,7 @@ scif4: serial@e6c40000 {
|
||||
dmas = <&dmac0 0x59>, <&dmac0 0x58>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 203>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -730,6 +763,7 @@ scif5: serial@e6f30000 {
|
||||
<&dmac2 0x5b>, <&dmac2 0x5a>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 202>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -743,6 +777,7 @@ msiof0: spi@e6e90000 {
|
||||
<&dmac2 0x41>, <&dmac2 0x40>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 211>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
@ -758,6 +793,7 @@ msiof1: spi@e6ea0000 {
|
||||
<&dmac2 0x43>, <&dmac2 0x42>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 210>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
@ -772,6 +808,7 @@ msiof2: spi@e6c00000 {
|
||||
dmas = <&dmac0 0x45>, <&dmac0 0x44>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 209>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
@ -786,6 +823,7 @@ msiof3: spi@e6c10000 {
|
||||
dmas = <&dmac0 0x47>, <&dmac0 0x46>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 208>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
@ -820,6 +858,7 @@ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
|
||||
clocks = <&cpg CPG_MOD 219>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 219>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <16>;
|
||||
};
|
||||
@ -853,6 +892,7 @@ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
|
||||
clocks = <&cpg CPG_MOD 218>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 218>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <16>;
|
||||
};
|
||||
@ -886,6 +926,7 @@ GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
|
||||
clocks = <&cpg CPG_MOD 217>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 217>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <16>;
|
||||
};
|
||||
@ -897,6 +938,7 @@ sdhi0: sd@ee100000 {
|
||||
clocks = <&cpg CPG_MOD 314>;
|
||||
max-frequency = <200000000>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 314>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -907,6 +949,7 @@ sdhi1: sd@ee120000 {
|
||||
clocks = <&cpg CPG_MOD 313>;
|
||||
max-frequency = <200000000>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 313>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -917,6 +960,7 @@ sdhi2: sd@ee140000 {
|
||||
clocks = <&cpg CPG_MOD 312>;
|
||||
max-frequency = <200000000>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 312>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -927,6 +971,7 @@ sdhi3: sd@ee160000 {
|
||||
clocks = <&cpg CPG_MOD 311>;
|
||||
max-frequency = <200000000>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 311>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -940,6 +985,7 @@ tsc: thermal@e6198000 {
|
||||
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 522>;
|
||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 522>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user