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arm64: dts: ls1028a: add missing SPI nodes
The LS1028A has three (dual) SPI controller. These are compatible with the ones from the LS1021A. Add the nodes. The third controller was tested on a custom board. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -290,6 +290,45 @@ fspi: spi@20c0000 {
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status = "disabled";
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};
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dspi0: spi@2100000 {
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compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x0 0x2100000 0x0 0x10000>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "dspi";
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clocks = <&clockgen 4 1>;
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spi-num-chipselects = <4>;
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little-endian;
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status = "disabled";
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};
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dspi1: spi@2110000 {
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compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x0 0x2110000 0x0 0x10000>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "dspi";
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clocks = <&clockgen 4 1>;
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spi-num-chipselects = <4>;
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little-endian;
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status = "disabled";
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};
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dspi2: spi@2120000 {
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compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x0 0x2120000 0x0 0x10000>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "dspi";
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clocks = <&clockgen 4 1>;
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spi-num-chipselects = <3>;
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little-endian;
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status = "disabled";
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};
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esdhc: mmc@2140000 {
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compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
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reg = <0x0 0x2140000 0x0 0x10000>;
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