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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 02:36:42 +07:00
staging: brcm80211: remove unsupported chipset code from brcmsmac phy
the phy sources contained some code fragments for chipsets that are not supported by this driver, which have been removed. Signed-off-by: Arend van Spriel <arend@broadcom.com> Reviewed-by: Roland Vossen <rvossen@broadcom.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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763456a66c
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@ -981,9 +981,8 @@ wlc_phy_table_addr(phy_info_t *pi, uint tbl_id, uint tbl_offset,
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pi->tbl_data_hi = tblDataHi;
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pi->tbl_data_lo = tblDataLo;
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if ((pi->sh->chip == BCM43224_CHIP_ID ||
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pi->sh->chip == BCM43421_CHIP_ID) &&
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(pi->sh->chiprev == 1)) {
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if (pi->sh->chip == BCM43224_CHIP_ID &&
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pi->sh->chiprev == 1) {
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pi->tbl_addr = tblAddr;
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pi->tbl_save_id = tbl_id;
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pi->tbl_save_offset = tbl_offset;
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@ -992,8 +991,7 @@ wlc_phy_table_addr(phy_info_t *pi, uint tbl_id, uint tbl_offset,
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void wlc_phy_table_data_write(phy_info_t *pi, uint width, u32 val)
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{
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if ((pi->sh->chip == BCM43224_CHIP_ID ||
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pi->sh->chip == BCM43421_CHIP_ID) &&
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if ((pi->sh->chip == BCM43224_CHIP_ID) &&
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(pi->sh->chiprev == 1) &&
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(pi->tbl_save_id == NPHY_TBL_ID_ANTSWCTRLLUT)) {
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read_phy_reg(pi, pi->tbl_data_lo);
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@ -1029,8 +1027,7 @@ wlc_phy_write_table(phy_info_t *pi, const phytbl_info_t *ptbl_info,
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for (idx = 0; idx < ptbl_info->tbl_len; idx++) {
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if ((pi->sh->chip == BCM43224_CHIP_ID ||
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pi->sh->chip == BCM43421_CHIP_ID) &&
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if ((pi->sh->chip == BCM43224_CHIP_ID) &&
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(pi->sh->chiprev == 1) &&
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(tbl_id == NPHY_TBL_ID_ANTSWCTRLLUT)) {
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read_phy_reg(pi, tblDataLo);
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@ -1070,8 +1067,7 @@ wlc_phy_read_table(phy_info_t *pi, const phytbl_info_t *ptbl_info,
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for (idx = 0; idx < ptbl_info->tbl_len; idx++) {
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if ((pi->sh->chip == BCM43224_CHIP_ID ||
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pi->sh->chip == BCM43421_CHIP_ID) &&
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if ((pi->sh->chip == BCM43224_CHIP_ID) &&
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(pi->sh->chiprev == 1)) {
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(void)read_phy_reg(pi, tblDataLo);
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@ -14550,11 +14550,6 @@ void WLBANDINITFN(wlc_phy_init_nphy) (phy_info_t *pi)
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}
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}
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if ((!PHY_IPA(pi)) && (pi->sh->chip == BCM5357_CHIP_ID)) {
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si_pmu_chipcontrol(pi->sh->sih, 1, CCTRL5357_EXTPA,
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CCTRL5357_EXTPA);
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}
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if ((pi->nphy_gband_spurwar2_en) && CHSPEC_IS2G(pi->radio_chanspec) &&
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CHSPEC_IS40(pi->radio_chanspec)) {
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@ -17581,11 +17576,6 @@ static void wlc_phy_radio_postinit_2057(phy_info_t *pi)
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mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x1, 0x1);
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if (pi->sh->chip == !BCM6362_CHIP_ID) {
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mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x2, 0x2);
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}
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mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x78);
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mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x80);
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mdelay(2);
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@ -17986,23 +17976,12 @@ wlc_phy_chanspec_radio2056_setup(phy_info_t *pi,
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write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 |
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RADIO_2056_SYN, 0x1f);
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if ((pi->sh->chip == BCM4716_CHIP_ID) ||
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(pi->sh->chip == BCM47162_CHIP_ID)) {
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write_radio_reg(pi,
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RADIO_2056_SYN_PLL_LOOPFILTER4 |
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RADIO_2056_SYN, 0x14);
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write_radio_reg(pi,
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RADIO_2056_SYN_PLL_CP2 |
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RADIO_2056_SYN, 0x00);
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} else {
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write_radio_reg(pi,
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RADIO_2056_SYN_PLL_LOOPFILTER4 |
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RADIO_2056_SYN, 0xb);
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write_radio_reg(pi,
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RADIO_2056_SYN_PLL_CP2 |
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RADIO_2056_SYN, 0x14);
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}
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write_radio_reg(pi,
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RADIO_2056_SYN_PLL_LOOPFILTER4 |
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RADIO_2056_SYN, 0xb);
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write_radio_reg(pi,
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RADIO_2056_SYN_PLL_CP2 |
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RADIO_2056_SYN, 0x14);
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}
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}
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@ -18049,38 +18028,25 @@ wlc_phy_chanspec_radio2056_setup(phy_info_t *pi,
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WRITE_RADIO_REG2(pi, RADIO_2056, TX, core,
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PADG_IDAC, 0xcc);
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if ((pi->sh->chip == BCM4716_CHIP_ID) ||
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(pi->sh->chip ==
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BCM47162_CHIP_ID)) {
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bias = 0x40;
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cascbias = 0x45;
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pag_boost_tune = 0x5;
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pgag_boost_tune = 0x33;
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padg_boost_tune = 0x77;
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mixg_boost_tune = 0x55;
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} else {
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bias = 0x25;
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cascbias = 0x20;
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bias = 0x25;
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cascbias = 0x20;
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if ((pi->sh->chip ==
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BCM43224_CHIP_ID)
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|| (pi->sh->chip ==
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BCM43225_CHIP_ID)
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|| (pi->sh->chip ==
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BCM43421_CHIP_ID)) {
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if (pi->sh->chippkg ==
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BCM43224_FAB_SMIC) {
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bias = 0x2a;
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cascbias = 0x38;
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}
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if ((pi->sh->chip ==
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BCM43224_CHIP_ID)
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|| (pi->sh->chip ==
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BCM43225_CHIP_ID)) {
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if (pi->sh->chippkg ==
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BCM43224_FAB_SMIC) {
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bias = 0x2a;
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cascbias = 0x38;
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}
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pag_boost_tune = 0x4;
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pgag_boost_tune = 0x03;
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padg_boost_tune = 0x77;
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mixg_boost_tune = 0x65;
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}
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pag_boost_tune = 0x4;
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pgag_boost_tune = 0x03;
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padg_boost_tune = 0x77;
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mixg_boost_tune = 0x65;
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WRITE_RADIO_REG2(pi, RADIO_2056, TX, core,
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INTPAG_IMAIN_STAT, bias);
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WRITE_RADIO_REG2(pi, RADIO_2056, TX, core,
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@ -18178,8 +18144,7 @@ wlc_phy_chanspec_radio2056_setup(phy_info_t *pi,
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cascbias = 0x30;
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if ((pi->sh->chip == BCM43224_CHIP_ID) ||
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(pi->sh->chip == BCM43225_CHIP_ID) ||
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(pi->sh->chip == BCM43421_CHIP_ID)) {
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(pi->sh->chip == BCM43225_CHIP_ID)) {
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if (pi->sh->chippkg == BCM43224_FAB_SMIC) {
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cascbias = 0x35;
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}
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@ -18907,14 +18872,8 @@ static void wlc_phy_spurwar_nphy(phy_info_t *pi)
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case 38:
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case 102:
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case 118:
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if ((pi->sh->chip == BCM4716_CHIP_ID) &&
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(pi->sh->chippkg == BCM4717_PKG_ID)) {
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nphy_adj_tone_id_buf[0] = 32;
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nphy_adj_noise_var_buf[0] = 0x21f;
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} else {
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nphy_adj_tone_id_buf[0] = 0;
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nphy_adj_noise_var_buf[0] = 0x0;
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}
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nphy_adj_tone_id_buf[0] = 0;
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nphy_adj_noise_var_buf[0] = 0x0;
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break;
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case 134:
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nphy_adj_tone_id_buf[0] = 32;
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@ -19041,34 +19000,20 @@ wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec,
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if (pi->nphy_aband_spurwar_en &&
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((val == 38) || (val == 102)
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|| (val == 118))) {
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if ((pi->sh->chip ==
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BCM4716_CHIP_ID)
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&& (pi->sh->chippkg ==
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BCM4717_PKG_ID)) {
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spuravoid = 0;
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} else {
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spuravoid = 1;
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}
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}
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|| (val == 118)))
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spuravoid = 1;
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}
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}
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if (pi->phy_spuravoid == SPURAVOID_FORCEON)
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spuravoid = 1;
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if ((pi->sh->chip == BCM4716_CHIP_ID) ||
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(pi->sh->chip == BCM47162_CHIP_ID)) {
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si_pmu_spuravoid(pi->sh->sih, spuravoid);
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} else {
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wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false);
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si_pmu_spuravoid(pi->sh->sih, spuravoid);
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wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true);
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}
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wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false);
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si_pmu_spuravoid(pi->sh->sih, spuravoid);
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wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true);
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if ((pi->sh->chip == BCM43224_CHIP_ID) ||
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(pi->sh->chip == BCM43225_CHIP_ID) ||
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(pi->sh->chip == BCM43421_CHIP_ID)) {
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(pi->sh->chip == BCM43225_CHIP_ID)) {
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if (spuravoid == 1) {
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@ -19085,10 +19030,7 @@ wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec,
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}
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}
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if (!((pi->sh->chip == BCM4716_CHIP_ID) ||
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(pi->sh->chip == BCM47162_CHIP_ID))) {
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wlapi_bmac_core_phypll_reset(pi->sh->physhim);
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}
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wlapi_bmac_core_phypll_reset(pi->sh->physhim);
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mod_phy_reg(pi, 0x01, (0x1 << 15),
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((spuravoid > 0) ? (0x1 << 15) : 0));
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@ -21035,19 +20977,9 @@ s16 wlc_phy_tempsense_nphy(phy_info_t *pi)
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wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16,
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&auxADC_rssi_ctrlH_save);
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if (pi->sh->chip == BCM5357_CHIP_ID) {
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radio_temp[0] = (193 * (radio_temp[1] + radio_temp2[1])
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+ 88 * (auxADC_Vl) - 27111 +
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128) / 256;
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} else if (pi->sh->chip == BCM43236_CHIP_ID) {
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radio_temp[0] = (198 * (radio_temp[1] + radio_temp2[1])
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+ 91 * (auxADC_Vl) - 27243 +
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128) / 256;
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} else {
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radio_temp[0] = (179 * (radio_temp[1] + radio_temp2[1])
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+ 82 * (auxADC_Vl) - 28861 +
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128) / 256;
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}
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radio_temp[0] = (179 * (radio_temp[1] + radio_temp2[1])
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+ 82 * (auxADC_Vl) - 28861 +
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128) / 256;
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offset = (s16) pi->phy_tempsense_offset;
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@ -26237,11 +26169,6 @@ static u32 *wlc_phy_get_ipa_gaintbl_nphy(phy_info_t *pi)
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} else if (NREV_IS(pi->pubpi.phy_rev, 6)) {
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tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev6;
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if (pi->sh->chip == BCM47162_CHIP_ID) {
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tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5;
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}
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} else if (NREV_IS(pi->pubpi.phy_rev, 5)) {
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tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5;
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@ -26781,11 +26708,8 @@ wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *txgains,
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phy_a2 = 63;
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if (CHSPEC_IS2G(pi->radio_chanspec)) {
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if (pi->sh->chip == BCM6362_CHIP_ID) {
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phy_a1 = 35;
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phy_a3 = 35;
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} else if ((pi->pubpi.radiorev == 4)
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|| (pi->pubpi.radiorev == 6)) {
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if ((pi->pubpi.radiorev == 4)
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|| (pi->pubpi.radiorev == 6)) {
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phy_a1 = 30;
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phy_a3 = 30;
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} else {
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@ -26891,16 +26815,10 @@ wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *txgains,
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if (txgains->useindex) {
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phy_a4 = 15 - ((txgains->index) >> 3);
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if (CHSPEC_IS2G(pi->radio_chanspec)) {
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if (NREV_GE(pi->pubpi.phy_rev, 6)) {
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if (NREV_GE(pi->pubpi.phy_rev, 6))
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phy_a5 = 0x00f7 | (phy_a4 << 8);
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if (pi->sh->chip ==
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BCM47162_CHIP_ID) {
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phy_a5 =
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0x10f7 | (phy_a4 <<
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8);
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}
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} else
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else
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if (NREV_IS(pi->pubpi.phy_rev, 5))
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phy_a5 = 0x10f7 | (phy_a4 << 8);
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else
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