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[ARM] 4581/1: Fix the conditional execution of the NWFPE instructions
Starting with ARMv7-A, conditional execution of undefined instructions can trigger an exception even if the condition check fails. This patch modifies the NWFPE support to check the condition before emulating the instruction. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -70,13 +70,24 @@ floating point instructions. GCC attempts to group floating point
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instructions to allow the emulator to spread the cost of the trap over
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several floating point instructions. */
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#include <asm/asm-offsets.h>
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.globl nwfpe_enter
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nwfpe_enter:
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mov r4, lr @ save the failure-return addresses
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mov sl, sp @ we access the registers via 'sl'
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ldr r5, [sp, #60] @ get contents of PC;
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ldr r5, [sp, #S_PC] @ get contents of PC;
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mov r6, r0 @ save the opcode
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emulate:
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ldr r1, [sp, #S_PSR] @ fetch the PSR
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bl checkCondition @ check the condition
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cmp r0, #0 @ r0 = 0 ==> condition failed
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@ if condition code failed to match, next insn
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beq next @ get the next instruction;
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mov r0, r6 @ prepare for EmulateAll()
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bl EmulateAll @ emulate the instruction
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cmp r0, #0 @ was emulation successful
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moveq pc, r4 @ no, return failure
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@ -91,18 +102,10 @@ next:
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teqne r2, #0x0E000000
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movne pc, r9 @ return ok if not a fp insn
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str r5, [sp, #60] @ update PC copy in regs
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str r5, [sp, #S_PC] @ update PC copy in regs
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mov r0, r6 @ save a copy
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ldr r1, [sp, #64] @ fetch the condition codes
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bl checkCondition @ check the condition
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cmp r0, #0 @ r0 = 0 ==> condition failed
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@ if condition code failed to match, next insn
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beq next @ get the next instruction;
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mov r0, r6 @ prepare for EmulateAll()
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b emulate @ if r0 != 0, goto EmulateAll
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b emulate @ check condition and emulate
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@ We need to be prepared for the instructions at .Lx1 and .Lx2
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@ to fault. Emit the appropriate exception gunk to fix things up.
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