mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-27 07:20:52 +07:00
Merge branch 'pci/misc' into next
* pci/misc: PCI: Enable access to non-standard VPD for Chelsio devices (cxgb3) PCI: Expand "VPD access disabled" quirk message PCI: pciehp: Remove loading message PCI: hotplug: Remove hotplug core message PCI: Remove service driver load/unload messages PCI/AER: Log AER IRQ when claiming Root Port PCI/AER: Log errors with PCI device, not PCIe service device PCI/AER: Remove unused version macros PCI/PME: Log PME IRQ when claiming Root Port PCI/PME: Drop unused support for PMEs from Root Complex Event Collectors PCI: Move config space size macros to pci_regs.h
This commit is contained in:
commit
c1f2e80c19
@ -23,6 +23,9 @@
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*
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* Send feedback to <kristen.c.accardi@intel.com>
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*
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* Authors:
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* Greg Kroah-Hartman <greg@kroah.com>
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* Scott Murray <scottm@somanetworks.com>
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*/
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#include <linux/module.h> /* try_module_get & module_put */
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@ -50,15 +53,9 @@
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#define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME, ## arg)
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#define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME, ## arg)
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/* local variables */
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static bool debug;
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#define DRIVER_VERSION "0.5"
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#define DRIVER_AUTHOR "Greg Kroah-Hartman <greg@kroah.com>, Scott Murray <scottm@somanetworks.com>"
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#define DRIVER_DESC "PCI Hot Plug PCI Core"
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static LIST_HEAD(pci_hotplug_slot_list);
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static DEFINE_MUTEX(pci_hp_mutex);
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@ -534,7 +531,6 @@ static int __init pci_hotplug_init(void)
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return result;
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}
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info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
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return result;
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}
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device_initcall(pci_hotplug_init);
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@ -25,6 +25,10 @@
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*
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* Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
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*
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* Authors:
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* Dan Zink <dan.zink@compaq.com>
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* Greg Kroah-Hartman <greg@kroah.com>
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* Dely Sy <dely.l.sy@intel.com>"
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*/
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#include <linux/moduleparam.h>
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@ -42,10 +46,6 @@ bool pciehp_poll_mode;
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int pciehp_poll_time;
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static bool pciehp_force;
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#define DRIVER_VERSION "0.4"
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#define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>, Dely Sy <dely.l.sy@intel.com>"
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#define DRIVER_DESC "PCI Express Hot Plug Controller Driver"
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/*
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* not really modular, but the easiest way to keep compat with existing
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* bootargs behaviour is to continue using module_param here.
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@ -333,7 +333,6 @@ static int __init pcied_init(void)
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retval = pcie_port_service_register(&hpdriver_portdrv);
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dbg("pcie_port_service_register = %d\n", retval);
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info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
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if (retval)
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dbg("Failure to register service\n");
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@ -1,9 +1,6 @@
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#ifndef DRIVERS_PCI_H
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#define DRIVERS_PCI_H
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#define PCI_CFG_SPACE_SIZE 256
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#define PCI_CFG_SPACE_EXP_SIZE 4096
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#define PCI_FIND_CAP_TTL 48
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extern const unsigned char pcie_link_speed[];
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@ -30,13 +30,6 @@
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#include "aerdrv.h"
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#include "../../pci.h"
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/*
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* Version Information
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*/
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#define DRIVER_VERSION "v1.0"
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#define DRIVER_AUTHOR "tom.l.nguyen@intel.com"
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#define DRIVER_DESC "Root Port Advanced Error Reporting Driver"
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static int aer_probe(struct pcie_device *dev);
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static void aer_remove(struct pcie_device *dev);
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static pci_ers_result_t aer_error_detected(struct pci_dev *dev,
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@ -297,12 +290,12 @@ static int aer_probe(struct pcie_device *dev)
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{
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int status;
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struct aer_rpc *rpc;
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struct device *device = &dev->device;
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struct device *device = &dev->port->dev;
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/* Alloc rpc data structure */
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rpc = aer_alloc_rpc(dev);
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if (!rpc) {
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dev_printk(KERN_DEBUG, device, "alloc rpc failed\n");
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dev_printk(KERN_DEBUG, device, "alloc AER rpc failed\n");
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aer_remove(dev);
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return -ENOMEM;
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}
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@ -310,7 +303,8 @@ static int aer_probe(struct pcie_device *dev)
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/* Request IRQ ISR */
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status = request_irq(dev->irq, aer_irq, IRQF_SHARED, "aerdrv", dev);
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if (status) {
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dev_printk(KERN_DEBUG, device, "request IRQ failed\n");
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dev_printk(KERN_DEBUG, device, "request AER IRQ %d failed\n",
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dev->irq);
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aer_remove(dev);
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return status;
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}
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@ -318,8 +312,8 @@ static int aer_probe(struct pcie_device *dev)
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rpc->isr = 1;
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aer_enable_rootport(rpc);
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return status;
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dev_info(device, "AER enabled with IRQ %d\n", dev->irq);
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return 0;
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}
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/**
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@ -300,8 +300,6 @@ static irqreturn_t pcie_pme_irq(int irq, void *context)
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*/
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static int pcie_pme_set_native(struct pci_dev *dev, void *ign)
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{
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dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");
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device_set_run_wake(&dev->dev, true);
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dev->pme_interrupt = true;
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return 0;
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@ -319,23 +317,8 @@ static int pcie_pme_set_native(struct pci_dev *dev, void *ign)
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static void pcie_pme_mark_devices(struct pci_dev *port)
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{
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pcie_pme_set_native(port, NULL);
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if (port->subordinate) {
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if (port->subordinate)
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pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
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} else {
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struct pci_bus *bus = port->bus;
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struct pci_dev *dev;
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/* Check if this is a root port event collector. */
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if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC || !bus)
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return;
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down_read(&pci_bus_sem);
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list_for_each_entry(dev, &bus->devices, bus_list)
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if (pci_is_pcie(dev)
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&& pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
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pcie_pme_set_native(dev, NULL);
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up_read(&pci_bus_sem);
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}
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}
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/**
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@ -364,12 +347,14 @@ static int pcie_pme_probe(struct pcie_device *srv)
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ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
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if (ret) {
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kfree(data);
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} else {
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pcie_pme_mark_devices(port);
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pcie_pme_interrupt_enable(port, true);
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return ret;
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}
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return ret;
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dev_info(&port->dev, "Signaling PME with IRQ %d\n", srv->irq);
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pcie_pme_mark_devices(port);
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pcie_pme_interrupt_enable(port, true);
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return 0;
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}
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static bool pcie_pme_check_wakeup(struct pci_bus *bus)
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@ -499,7 +499,6 @@ static int pcie_port_probe_service(struct device *dev)
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if (status)
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return status;
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dev_printk(KERN_DEBUG, dev, "service driver %s loaded\n", driver->name);
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get_device(dev);
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return 0;
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}
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@ -524,8 +523,6 @@ static int pcie_port_remove_service(struct device *dev)
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pciedev = to_pcie_device(dev);
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driver = to_service_driver(dev->driver);
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if (driver && driver->remove) {
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dev_printk(KERN_DEBUG, dev, "unloading service driver %s\n",
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driver->name);
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driver->remove(pciedev);
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put_device(dev);
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}
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@ -2156,7 +2156,7 @@ static void quirk_blacklist_vpd(struct pci_dev *dev)
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{
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if (dev->vpd) {
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dev->vpd->len = 0;
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dev_warn(&dev->dev, FW_BUG "VPD access disabled\n");
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dev_warn(&dev->dev, FW_BUG "disabling VPD access (can't determine size of non-standard VPD format)\n");
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}
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}
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@ -3255,6 +3255,25 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PORT_RIDGE,
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quirk_thunderbolt_hotplug_msi);
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static void quirk_chelsio_extend_vpd(struct pci_dev *dev)
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{
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pci_set_vpd_size(dev, 8192);
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, 0x20, quirk_chelsio_extend_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, 0x21, quirk_chelsio_extend_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, 0x22, quirk_chelsio_extend_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, 0x23, quirk_chelsio_extend_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, 0x24, quirk_chelsio_extend_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, 0x25, quirk_chelsio_extend_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, 0x26, quirk_chelsio_extend_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, 0x30, quirk_chelsio_extend_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, 0x31, quirk_chelsio_extend_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, 0x32, quirk_chelsio_extend_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, 0x35, quirk_chelsio_extend_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, 0x36, quirk_chelsio_extend_vpd);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CHELSIO, 0x37, quirk_chelsio_extend_vpd);
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#ifdef CONFIG_ACPI
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/*
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* Apple: Shutdown Cactus Ridge Thunderbolt controller.
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@ -31,8 +31,6 @@
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#include "vfio_pci_private.h"
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#define PCI_CFG_SPACE_SIZE 256
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/* Fake capability ID for standard config space */
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#define PCI_CAP_ID_BASIC 0
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#ifndef LINUX_PCI_REGS_H
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#define LINUX_PCI_REGS_H
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/*
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* Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
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* configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
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* configuration space.
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*/
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#define PCI_CFG_SPACE_SIZE 256
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#define PCI_CFG_SPACE_EXP_SIZE 4096
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/*
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* Under PCI, each device has 256 bytes of configuration address space,
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* of which the first 64 bytes are standardized as follows:
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