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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 01:36:38 +07:00
cxgb4: Use FW LDST cmd to access TP_PIO_{ADDR, DATA} register first
The TP_PIO_{ADDR,DATA} registers are are in conflict with the firmware's use of these registers. Added a routine to access it through FW LDST cmd. Access all TP_PIO_{ADDR,DATA} register access through new routine if FW is alive. If firmware is dead, than fall back to indirect access. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -4068,8 +4068,8 @@ static int adap_init0(struct adapter *adap)
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adap->params.b_wnd);
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}
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t4_init_sge_params(adap);
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t4_init_tp_params(adap);
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adap->flags |= FW_OK;
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t4_init_tp_params(adap);
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return 0;
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/*
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@ -3632,6 +3632,40 @@ int t4_read_rss(struct adapter *adapter, u16 *map)
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return 0;
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}
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/**
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* t4_fw_tp_pio_rw - Access TP PIO through LDST
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* @adap: the adapter
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* @vals: where the indirect register values are stored/written
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* @nregs: how many indirect registers to read/write
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* @start_idx: index of first indirect register to read/write
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* @rw: Read (1) or Write (0)
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*
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* Access TP PIO registers through LDST
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*/
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static void t4_fw_tp_pio_rw(struct adapter *adap, u32 *vals, unsigned int nregs,
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unsigned int start_index, unsigned int rw)
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{
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int ret, i;
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int cmd = FW_LDST_ADDRSPC_TP_PIO;
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struct fw_ldst_cmd c;
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for (i = 0 ; i < nregs; i++) {
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memset(&c, 0, sizeof(c));
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c.op_to_addrspace = cpu_to_be32(FW_CMD_OP_V(FW_LDST_CMD) |
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FW_CMD_REQUEST_F |
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(rw ? FW_CMD_READ_F :
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FW_CMD_WRITE_F) |
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FW_LDST_CMD_ADDRSPACE_V(cmd));
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c.cycles_to_len16 = cpu_to_be32(FW_LEN16(c));
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c.u.addrval.addr = cpu_to_be32(start_index + i);
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c.u.addrval.val = rw ? 0 : cpu_to_be32(vals[i]);
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ret = t4_wr_mbox(adap, adap->mbox, &c, sizeof(c), &c);
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if (!ret && rw)
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vals[i] = be32_to_cpu(c.u.addrval.val);
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}
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}
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/**
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* t4_read_rss_key - read the global RSS key
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* @adap: the adapter
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@ -3641,8 +3675,11 @@ int t4_read_rss(struct adapter *adapter, u16 *map)
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*/
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void t4_read_rss_key(struct adapter *adap, u32 *key)
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{
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t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, key, 10,
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TP_RSS_SECRET_KEY0_A);
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if (adap->flags & FW_OK)
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t4_fw_tp_pio_rw(adap, key, 10, TP_RSS_SECRET_KEY0_A, 1);
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else
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t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, key, 10,
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TP_RSS_SECRET_KEY0_A);
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}
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/**
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@ -3668,8 +3705,11 @@ void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx)
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(vrt & KEYEXTEND_F) && (KEYMODE_G(vrt) == 3))
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rss_key_addr_cnt = 32;
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t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, key, 10,
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TP_RSS_SECRET_KEY0_A);
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if (adap->flags & FW_OK)
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t4_fw_tp_pio_rw(adap, (void *)key, 10, TP_RSS_SECRET_KEY0_A, 0);
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else
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t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, key, 10,
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TP_RSS_SECRET_KEY0_A);
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if (idx >= 0 && idx < rss_key_addr_cnt) {
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if (rss_key_addr_cnt > 16)
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@ -3694,8 +3734,12 @@ void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx)
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void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index,
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u32 *valp)
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{
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t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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valp, 1, TP_RSS_PF0_CONFIG_A + index);
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if (adapter->flags & FW_OK)
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t4_fw_tp_pio_rw(adapter, valp, 1,
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TP_RSS_PF0_CONFIG_A + index, 1);
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else
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t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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valp, 1, TP_RSS_PF0_CONFIG_A + index);
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}
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/**
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@ -3730,10 +3774,15 @@ void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index,
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/* Grab the VFL/VFH values ...
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*/
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t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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vfl, 1, TP_RSS_VFL_CONFIG_A);
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t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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vfh, 1, TP_RSS_VFH_CONFIG_A);
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if (adapter->flags & FW_OK) {
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t4_fw_tp_pio_rw(adapter, vfl, 1, TP_RSS_VFL_CONFIG_A, 1);
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t4_fw_tp_pio_rw(adapter, vfh, 1, TP_RSS_VFH_CONFIG_A, 1);
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} else {
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t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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vfl, 1, TP_RSS_VFL_CONFIG_A);
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t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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vfh, 1, TP_RSS_VFH_CONFIG_A);
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}
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}
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/**
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@ -3746,8 +3795,11 @@ u32 t4_read_rss_pf_map(struct adapter *adapter)
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{
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u32 pfmap;
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t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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&pfmap, 1, TP_RSS_PF_MAP_A);
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if (adapter->flags & FW_OK)
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t4_fw_tp_pio_rw(adapter, &pfmap, 1, TP_RSS_PF_MAP_A, 1);
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else
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t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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&pfmap, 1, TP_RSS_PF_MAP_A);
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return pfmap;
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}
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@ -3761,8 +3813,11 @@ u32 t4_read_rss_pf_mask(struct adapter *adapter)
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{
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u32 pfmask;
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t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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&pfmask, 1, TP_RSS_PF_MSK_A);
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if (adapter->flags & FW_OK)
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t4_fw_tp_pio_rw(adapter, &pfmask, 1, TP_RSS_PF_MSK_A, 1);
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else
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t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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&pfmask, 1, TP_RSS_PF_MSK_A);
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return pfmask;
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}
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@ -6137,12 +6192,19 @@ int t4_init_tp_params(struct adapter *adap)
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/* Cache the adapter's Compressed Filter Mode and global Incress
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* Configuration.
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*/
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t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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&adap->params.tp.vlan_pri_map, 1,
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TP_VLAN_PRI_MAP_A);
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t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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&adap->params.tp.ingress_config, 1,
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TP_INGRESS_CONFIG_A);
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if (adap->flags & FW_OK) {
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t4_fw_tp_pio_rw(adap, &adap->params.tp.vlan_pri_map, 1,
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TP_VLAN_PRI_MAP_A, 1);
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t4_fw_tp_pio_rw(adap, &adap->params.tp.ingress_config, 1,
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TP_INGRESS_CONFIG_A, 1);
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} else {
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t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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&adap->params.tp.vlan_pri_map, 1,
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TP_VLAN_PRI_MAP_A);
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t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
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&adap->params.tp.ingress_config, 1,
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TP_INGRESS_CONFIG_A);
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}
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/* Now that we have TP_VLAN_PRI_MAP cached, we can calculate the field
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* shift positions of several elements of the Compressed Filter Tuple
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