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usb: Spelling s/enpoint/endpoint/
Fix misspellings of "endpoint". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Li Yang <leoyang.li@nxp.com> Acked-by: Minas Harutyunyan <hminas@synopsys.com> Link: https://lore.kernel.org/r/20191024152833.30698-1-geert+renesas@glider.be Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -134,7 +134,7 @@ struct dwc2_hsotg_req;
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* @target_frame: Targeted frame num to setup next ISOC transfer
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* @frame_overrun: Indicates SOF number overrun in DSTS
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*
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* This is the driver's state for each registered enpoint, allowing it
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* This is the driver's state for each registered endpoint, allowing it
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* to keep track of transactions that need doing. Each endpoint has a
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* lock to protect the state, to try and avoid using an overall lock
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* for the host controller as much as possible.
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@ -333,8 +333,8 @@ struct qe_udc {
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u32 resume_state; /* USB state to resume*/
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u32 usb_state; /* USB current state */
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u32 usb_next_state; /* USB next state */
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u32 ep0_state; /* Enpoint zero state */
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u32 ep0_dir; /* Enpoint zero direction: can be
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u32 ep0_state; /* Endpoint zero state */
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u32 ep0_dir; /* Endpoint zero direction: can be
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USB_DIR_IN or USB_DIR_OUT*/
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u32 usb_sof_count; /* SOF count */
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u32 errors; /* USB ERRORs count */
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@ -138,7 +138,7 @@ struct mv_u3d_op_regs {
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u32 doorbell; /* doorbell register */
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};
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/* control enpoint enable registers */
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/* control endpoint enable registers */
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struct epxcr {
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u32 epxoutcr0; /* ep out control 0 register */
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u32 epxoutcr1; /* ep out control 1 register */
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@ -1315,7 +1315,7 @@ static int musb_gadget_dequeue(struct usb_ep *ep, struct usb_request *request)
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}
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/*
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* Set or clear the halt bit of an endpoint. A halted enpoint won't tx/rx any
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* Set or clear the halt bit of an endpoint. A halted endpoint won't tx/rx any
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* data but will queue requests.
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*
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* exported to ep0 code
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