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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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arm: dts: lpc32xx: add device nodes for standard timers
NXP LPC32xx SoCs have 6 standard timers, add device nodes to describe them. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
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@ -271,11 +271,31 @@ gpio: gpio@40028000 {
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#gpio-cells = <3>; /* bank, pin, flags */
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};
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timer4: timer@4002C000 {
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compatible = "nxp,lpc3220-timer";
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reg = <0x4002C000 0x1000>;
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interrupts = <0x3 0>;
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status = "disabled";
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};
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timer5: timer@40030000 {
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compatible = "nxp,lpc3220-timer";
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reg = <0x40030000 0x1000>;
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interrupts = <0x4 0>;
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status = "disabled";
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};
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watchdog: watchdog@4003C000 {
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compatible = "nxp,pnx4008-wdt";
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reg = <0x4003C000 0x1000>;
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};
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timer0: timer@40044000 {
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compatible = "nxp,lpc3220-timer";
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reg = <0x40044000 0x1000>;
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interrupts = <0x10 0>;
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};
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/*
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* TSC vs. ADC: Since those two share the same
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* hardware, you need to choose from one of the
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@ -297,6 +317,12 @@ tsc: tsc@40048000 {
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status = "disabled";
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};
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timer1: timer@4004C000 {
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compatible = "nxp,lpc3220-timer";
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reg = <0x4004C000 0x1000>;
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interrupts = <0x11 0>;
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};
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key: key@40050000 {
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compatible = "nxp,lpc3220-key";
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reg = <0x40050000 0x1000>;
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@ -304,6 +330,13 @@ key: key@40050000 {
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status = "disabled";
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};
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timer2: timer@40058000 {
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compatible = "nxp,lpc3220-timer";
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reg = <0x40058000 0x1000>;
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interrupts = <0x12 0>;
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status = "disabled";
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};
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pwm1: pwm@4005C000 {
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compatible = "nxp,lpc3220-pwm";
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reg = <0x4005C000 0x4>;
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@ -315,6 +348,13 @@ pwm2: pwm@4005C004 {
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reg = <0x4005C004 0x4>;
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status = "disabled";
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};
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timer3: timer@40060000 {
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compatible = "nxp,lpc3220-timer";
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reg = <0x40060000 0x1000>;
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interrupts = <0x13 0>;
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status = "disabled";
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};
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};
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};
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};
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