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drm/amd/display: Program CW5 for tracebuffer for dcn20
[Why] On dcn21 this is programmed for tracebuffer support but isn't being programmed on dcn20. DMCUB execution hits an undefined address 65000000 on tracebuffer access. [How] Program CW5. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -99,6 +99,13 @@ void dmub_dcn20_setup_windows(struct dmub_srv *dmub,
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REG_SET_2(DMCUB_REGION4_TOP_ADDRESS, 0, DMCUB_REGION4_TOP_ADDRESS,
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cw4->region.top - cw4->region.base - 1, DMCUB_REGION4_ENABLE,
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1);
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REG_WRITE(DMCUB_REGION3_CW5_OFFSET, cw5->offset.u.low_part);
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REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, cw5->offset.u.high_part);
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REG_WRITE(DMCUB_REGION3_CW5_BASE_ADDRESS, cw5->region.base);
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REG_SET_2(DMCUB_REGION3_CW5_TOP_ADDRESS, 0,
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DMCUB_REGION3_CW5_TOP_ADDRESS, cw5->region.top,
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DMCUB_REGION3_CW5_ENABLE, 1);
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}
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void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub,
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