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dt-bindings: power: apmu: Convert to json-schema

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Convert the Renesas Advanced Power Management Unit Device Tree binding
documentation to json-schema.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Geert Uytterhoeven 2020-02-24 14:52:51 +01:00 committed by Rob Herring
parent 8db9684beb
commit c1507cf227
2 changed files with 55 additions and 35 deletions
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35
Documentation/devicetree/bindings/power/renesas,apmu.txt
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DT bindings for the Renesas Advanced Power Management Unit
Renesas R-Car and RZ/G1 SoCs utilize one or more APMU hardware units
for CPU core power domain control including SMP boot and CPU Hotplug.
Required properties:
- compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback.
Examples with soctypes are:
- "renesas,r8a7743-apmu" (RZ/G1M)
- "renesas,r8a7744-apmu" (RZ/G1N)
- "renesas,r8a7745-apmu" (RZ/G1E)
- "renesas,r8a77470-apmu" (RZ/G1C)
- "renesas,r8a7790-apmu" (R-Car H2)
- "renesas,r8a7791-apmu" (R-Car M2-W)
- "renesas,r8a7792-apmu" (R-Car V2H)
- "renesas,r8a7793-apmu" (R-Car M2-N)
- "renesas,r8a7794-apmu" (R-Car E2)
- reg: Base address and length of the I/O registers used by the APMU.
- cpus: This node contains a list of CPU cores, which should match the order
of CPU cores used by the WUPCR and PSTR registers in the Advanced Power
Management Unit section of the device's datasheet.
Example:
This shows the r8a7791 APMU that can control CPU0 and CPU1.
apmu@e6152000 {
compatible = "renesas,r8a7791-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1>;
};

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Documentation/devicetree/bindings/power/renesas,apmu.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/power/renesas,apmu.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Renesas Advanced Power Management Unit
maintainers:
- Geert Uytterhoeven <geert+renesas@glider.be>
- Magnus Damm <magnus.damm@gmail.com>
description:
Renesas R-Car Gen2 and RZ/G1 SoCs utilize one or more APMU hardware units for
CPU core power domain control including SMP boot and CPU Hotplug.
properties:
compatible:
items:
- enum:
- renesas,r8a7743-apmu # RZ/G1M
- renesas,r8a7744-apmu # RZ/G1N
- renesas,r8a7745-apmu # RZ/G1E
- renesas,r8a77470-apmu # RZ/G1C
- renesas,r8a7790-apmu # R-Car H2
- renesas,r8a7791-apmu # R-Car M2-W
- renesas,r8a7792-apmu # R-Car V2H
- renesas,r8a7793-apmu # R-Car M2-N
- renesas,r8a7794-apmu # R-Car E2
- const: renesas,apmu
reg:
maxItems: 1
cpus:
$ref: /schemas/types.yaml#/definitions/phandle-array
description: |
Array of phandles pointing to CPU cores, which should match the order of
CPU cores used by the WUPCR and PSTR registers in the Advanced Power
Management Unit section of the device's datasheet.
required:
- compatible
- reg
- cpus
additionalProperties: false
examples:
- |
apmu@e6152000 {
compatible = "renesas,r8a7791-apmu", "renesas,apmu";
reg = <0xe6152000 0x188>;
cpus = <&cpu0 &cpu1>;
};