mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-14 06:48:33 +07:00
drm/i915: s/num_active_crtcs/num_active_pipes/
Set a good example and talk about pipes rather than crtcs. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190821173033.24123-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
parent
d048a2684a
commit
c08e913239
@ -1490,7 +1490,7 @@ static void g4x_merge_wm(struct drm_i915_private *dev_priv,
|
|||||||
struct g4x_wm_values *wm)
|
struct g4x_wm_values *wm)
|
||||||
{
|
{
|
||||||
struct intel_crtc *crtc;
|
struct intel_crtc *crtc;
|
||||||
int num_active_crtcs = 0;
|
int num_active_pipes = 0;
|
||||||
|
|
||||||
wm->cxsr = true;
|
wm->cxsr = true;
|
||||||
wm->hpll_en = true;
|
wm->hpll_en = true;
|
||||||
@ -1509,10 +1509,10 @@ static void g4x_merge_wm(struct drm_i915_private *dev_priv,
|
|||||||
if (!wm_state->fbc_en)
|
if (!wm_state->fbc_en)
|
||||||
wm->fbc_en = false;
|
wm->fbc_en = false;
|
||||||
|
|
||||||
num_active_crtcs++;
|
num_active_pipes++;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (num_active_crtcs != 1) {
|
if (num_active_pipes != 1) {
|
||||||
wm->cxsr = false;
|
wm->cxsr = false;
|
||||||
wm->hpll_en = false;
|
wm->hpll_en = false;
|
||||||
wm->fbc_en = false;
|
wm->fbc_en = false;
|
||||||
@ -2098,7 +2098,7 @@ static void vlv_merge_wm(struct drm_i915_private *dev_priv,
|
|||||||
struct vlv_wm_values *wm)
|
struct vlv_wm_values *wm)
|
||||||
{
|
{
|
||||||
struct intel_crtc *crtc;
|
struct intel_crtc *crtc;
|
||||||
int num_active_crtcs = 0;
|
int num_active_pipes = 0;
|
||||||
|
|
||||||
wm->level = dev_priv->wm.max_level;
|
wm->level = dev_priv->wm.max_level;
|
||||||
wm->cxsr = true;
|
wm->cxsr = true;
|
||||||
@ -2112,14 +2112,14 @@ static void vlv_merge_wm(struct drm_i915_private *dev_priv,
|
|||||||
if (!wm_state->cxsr)
|
if (!wm_state->cxsr)
|
||||||
wm->cxsr = false;
|
wm->cxsr = false;
|
||||||
|
|
||||||
num_active_crtcs++;
|
num_active_pipes++;
|
||||||
wm->level = min_t(int, wm->level, wm_state->num_levels - 1);
|
wm->level = min_t(int, wm->level, wm_state->num_levels - 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (num_active_crtcs != 1)
|
if (num_active_pipes != 1)
|
||||||
wm->cxsr = false;
|
wm->cxsr = false;
|
||||||
|
|
||||||
if (num_active_crtcs > 1)
|
if (num_active_pipes > 1)
|
||||||
wm->level = VLV_WM_LEVEL_PM2;
|
wm->level = VLV_WM_LEVEL_PM2;
|
||||||
|
|
||||||
for_each_intel_crtc(&dev_priv->drm, crtc) {
|
for_each_intel_crtc(&dev_priv->drm, crtc) {
|
||||||
|
Loading…
Reference in New Issue
Block a user