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[SCSI] be2iscsi: Alloc only one EQ if intr mode
This patch ensures that we alloc only one EQ if we are if we are not in msix mode Signed-off-by: Jayamohan Kallickal <jayamohank@serverengines.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
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@ -3190,14 +3190,18 @@ static unsigned char hwi_enable_intr(struct beiscsi_hba *phba)
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reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
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reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
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SE_DEBUG(DBG_LVL_8, "reg =x%08x addr=%p \n", reg, addr);
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SE_DEBUG(DBG_LVL_8, "reg =x%08x addr=%p \n", reg, addr);
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iowrite32(reg, addr);
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iowrite32(reg, addr);
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if (!phba->msix_enabled) {
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eq = &phwi_context->be_eq[0].q;
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SE_DEBUG(DBG_LVL_8, "eq->id=%d \n", eq->id);
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hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
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} else {
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for (i = 0; i <= phba->num_cpus; i++) {
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for (i = 0; i <= phba->num_cpus; i++) {
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eq = &phwi_context->be_eq[i].q;
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eq = &phwi_context->be_eq[i].q;
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SE_DEBUG(DBG_LVL_8, "eq->id=%d \n", eq->id);
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SE_DEBUG(DBG_LVL_8, "eq->id=%d \n", eq->id);
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hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
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hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
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}
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}
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} else
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}
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shost_printk(KERN_WARNING, phba->shost,
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}
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"In hwi_enable_intr, Not Enabled \n");
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return true;
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return true;
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}
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}
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