mips: loongsoon2ef: remove private clk api

As platforms are moving to COMMON_CLK in general, loongson2ef
stuck out as something that has a private implementation but
does not actually use it except for setting the frequency of
the CPU itself from the loongson2_cpufreq driver.

Change that driver to call the register setting function directly
and remove the rest of the stub implementation.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Arnd Bergmann 2020-04-09 11:02:28 +02:00 committed by Thomas Bogendoerfer
parent 5ceb89f8a3
commit c02e963044
6 changed files with 8 additions and 164 deletions

View File

@ -1,49 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_MIPS_CLOCK_H
#define __ASM_MIPS_CLOCK_H
#include <linux/kref.h>
#include <linux/list.h>
#include <linux/seq_file.h>
#include <linux/clk.h>
struct clk;
struct clk_ops {
void (*init) (struct clk *clk);
void (*enable) (struct clk *clk);
void (*disable) (struct clk *clk);
void (*recalc) (struct clk *clk);
int (*set_rate) (struct clk *clk, unsigned long rate, int algo_id);
long (*round_rate) (struct clk *clk, unsigned long rate);
};
struct clk {
struct list_head node;
const char *name;
int id;
struct module *owner;
struct clk *parent;
struct clk_ops *ops;
struct kref kref;
unsigned long rate;
unsigned long flags;
};
#define CLK_ALWAYS_ENABLED (1 << 0)
#define CLK_RATE_PROPAGATES (1 << 1)
int clk_init(void);
int __clk_enable(struct clk *);
void __clk_disable(struct clk *);
void clk_recalc_rate(struct clk *);
int clk_register(struct clk *);
void clk_unregister(struct clk *);
#endif /* __ASM_MIPS_CLOCK_H */

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@ -244,6 +244,7 @@ static inline void do_perfcnt_IRQ(void)
#ifdef CONFIG_CPU_SUPPORTS_CPUFREQ #ifdef CONFIG_CPU_SUPPORTS_CPUFREQ
#include <linux/cpufreq.h> #include <linux/cpufreq.h>
extern struct cpufreq_frequency_table loongson2_clockmod_table[]; extern struct cpufreq_frequency_table loongson2_clockmod_table[];
extern int loongson2_cpu_set_rate(unsigned long rate_khz);
#endif #endif
/* /*

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@ -46,7 +46,6 @@ config LEMOTE_MACH2F
select CSRC_R4K if ! MIPS_EXTERNAL_TIMER select CSRC_R4K if ! MIPS_EXTERNAL_TIMER
select DMA_NONCOHERENT select DMA_NONCOHERENT
select GENERIC_ISA_DMA_SUPPORT_BROKEN select GENERIC_ISA_DMA_SUPPORT_BROKEN
select HAVE_CLK
select FORCE_PCI select FORCE_PCI
select I8259 select I8259
select IRQ_MIPS_CPU select IRQ_MIPS_CPU

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@ -6,22 +6,12 @@
* License. See the file "COPYING" in the main directory of this archive * License. See the file "COPYING" in the main directory of this archive
* for more details. * for more details.
*/ */
#include <linux/clk.h>
#include <linux/cpufreq.h> #include <linux/cpufreq.h>
#include <linux/errno.h> #include <linux/errno.h>
#include <linux/export.h> #include <linux/export.h>
#include <linux/list.h>
#include <linux/mutex.h>
#include <linux/spinlock.h>
#include <asm/clock.h>
#include <asm/mach-loongson2ef/loongson.h> #include <asm/mach-loongson2ef/loongson.h>
static LIST_HEAD(clock_list);
static DEFINE_SPINLOCK(clock_lock);
static DEFINE_MUTEX(clock_list_sem);
/* Minimum CLK support */
enum { enum {
DC_ZERO, DC_25PT = 2, DC_37PT, DC_50PT, DC_62PT, DC_75PT, DC_ZERO, DC_25PT = 2, DC_37PT, DC_50PT, DC_62PT, DC_75PT,
DC_87PT, DC_DISABLE, DC_RESV DC_87PT, DC_DISABLE, DC_RESV
@ -41,103 +31,21 @@ struct cpufreq_frequency_table loongson2_clockmod_table[] = {
}; };
EXPORT_SYMBOL_GPL(loongson2_clockmod_table); EXPORT_SYMBOL_GPL(loongson2_clockmod_table);
static struct clk cpu_clk = { int loongson2_cpu_set_rate(unsigned long rate_khz)
.name = "cpu_clk",
.flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
.rate = 800000000,
};
struct clk *clk_get(struct device *dev, const char *id)
{ {
return &cpu_clk;
}
EXPORT_SYMBOL(clk_get);
static void propagate_rate(struct clk *clk)
{
struct clk *clkp;
list_for_each_entry(clkp, &clock_list, node) {
if (likely(clkp->parent != clk))
continue;
if (likely(clkp->ops && clkp->ops->recalc))
clkp->ops->recalc(clkp);
if (unlikely(clkp->flags & CLK_RATE_PROPAGATES))
propagate_rate(clkp);
}
}
int clk_enable(struct clk *clk)
{
return 0;
}
EXPORT_SYMBOL(clk_enable);
void clk_disable(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_disable);
unsigned long clk_get_rate(struct clk *clk)
{
if (!clk)
return 0;
return (unsigned long)clk->rate;
}
EXPORT_SYMBOL(clk_get_rate);
void clk_put(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_put);
int clk_set_rate(struct clk *clk, unsigned long rate)
{
unsigned int rate_khz = rate / 1000;
struct cpufreq_frequency_table *pos; struct cpufreq_frequency_table *pos;
int ret = 0;
int regval; int regval;
if (likely(clk->ops && clk->ops->set_rate)) {
unsigned long flags;
spin_lock_irqsave(&clock_lock, flags);
ret = clk->ops->set_rate(clk, rate, 0);
spin_unlock_irqrestore(&clock_lock, flags);
}
if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
propagate_rate(clk);
cpufreq_for_each_valid_entry(pos, loongson2_clockmod_table) cpufreq_for_each_valid_entry(pos, loongson2_clockmod_table)
if (rate_khz == pos->frequency) if (rate_khz == pos->frequency)
break; break;
if (rate_khz != pos->frequency) if (rate_khz != pos->frequency)
return -ENOTSUPP; return -ENOTSUPP;
clk->rate = rate;
regval = readl(LOONGSON_CHIPCFG); regval = readl(LOONGSON_CHIPCFG);
regval = (regval & ~0x7) | (pos->driver_data - 1); regval = (regval & ~0x7) | (pos->driver_data - 1);
writel(regval, LOONGSON_CHIPCFG); writel(regval, LOONGSON_CHIPCFG);
return ret; return 0;
} }
EXPORT_SYMBOL_GPL(clk_set_rate); EXPORT_SYMBOL_GPL(loongson2_cpu_set_rate);
long clk_round_rate(struct clk *clk, unsigned long rate)
{
if (likely(clk->ops && clk->ops->round_rate)) {
unsigned long flags, rounded;
spin_lock_irqsave(&clock_lock, flags);
rounded = clk->ops->round_rate(clk, rate);
spin_unlock_irqrestore(&clock_lock, flags);
return rounded;
}
return rate;
}
EXPORT_SYMBOL_GPL(clk_round_rate);

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@ -15,7 +15,6 @@
#include <linux/kexec.h> #include <linux/kexec.h>
#include <asm/processor.h> #include <asm/processor.h>
#include <asm/time.h> #include <asm/time.h>
#include <asm/clock.h>
#include <asm/tlbflush.h> #include <asm/tlbflush.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <loongson.h> #include <loongson.h>

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@ -20,7 +20,6 @@
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <asm/clock.h>
#include <asm/idle.h> #include <asm/idle.h>
#include <asm/mach-loongson2ef/loongson.h> #include <asm/mach-loongson2ef/loongson.h>
@ -58,29 +57,20 @@ static int loongson2_cpufreq_target(struct cpufreq_policy *policy,
loongson2_clockmod_table[index].driver_data) / 8; loongson2_clockmod_table[index].driver_data) / 8;
/* setting the cpu frequency */ /* setting the cpu frequency */
clk_set_rate(policy->clk, freq * 1000); loongson2_cpu_set_rate(freq);
return 0; return 0;
} }
static int loongson2_cpufreq_cpu_init(struct cpufreq_policy *policy) static int loongson2_cpufreq_cpu_init(struct cpufreq_policy *policy)
{ {
struct clk *cpuclk;
int i; int i;
unsigned long rate; unsigned long rate;
int ret; int ret;
cpuclk = clk_get(NULL, "cpu_clk");
if (IS_ERR(cpuclk)) {
pr_err("couldn't get CPU clk\n");
return PTR_ERR(cpuclk);
}
rate = cpu_clock_freq / 1000; rate = cpu_clock_freq / 1000;
if (!rate) { if (!rate)
clk_put(cpuclk);
return -EINVAL; return -EINVAL;
}
/* clock table init */ /* clock table init */
for (i = 2; for (i = 2;
@ -88,20 +78,16 @@ static int loongson2_cpufreq_cpu_init(struct cpufreq_policy *policy)
i++) i++)
loongson2_clockmod_table[i].frequency = (rate * i) / 8; loongson2_clockmod_table[i].frequency = (rate * i) / 8;
ret = clk_set_rate(cpuclk, rate * 1000); ret = loongson2_cpu_set_rate(rate);
if (ret) { if (ret)
clk_put(cpuclk);
return ret; return ret;
}
policy->clk = cpuclk;
cpufreq_generic_init(policy, &loongson2_clockmod_table[0], 0); cpufreq_generic_init(policy, &loongson2_clockmod_table[0], 0);
return 0; return 0;
} }
static int loongson2_cpufreq_exit(struct cpufreq_policy *policy) static int loongson2_cpufreq_exit(struct cpufreq_policy *policy)
{ {
clk_put(policy->clk);
return 0; return 0;
} }