From 72cd625c85e2681bad718b5218bf672d7fa5af80 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 4 Mar 2019 20:59:58 +0100 Subject: [PATCH 01/21] ARM: dts: r8a7792: blanche: Add IIC3 and DA9063 PMIC node Add IIC3 node to R8A7792 SoC device tree and a DA9063 PMIC node to V2H Blanche board device tree. Signed-off-by: Marek Vasut Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7792-blanche.dts | 20 ++++++++++++++++++++ arch/arm/boot/dts/r8a7792.dtsi | 18 ++++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts b/arch/arm/boot/dts/r8a7792-blanche.dts index f92301290b02..b6fa80c3b07e 100644 --- a/arch/arm/boot/dts/r8a7792-blanche.dts +++ b/arch/arm/boot/dts/r8a7792-blanche.dts @@ -308,6 +308,26 @@ adv7511_out: endpoint { }; }; +&iic3 { + status = "okay"; + + pmic@58 { + compatible = "dlg,da9063"; + reg = <0x58>; + interrupt-parent = <&irqc>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + + rtc { + compatible = "dlg,da9063-rtc"; + }; + + wdt { + compatible = "dlg,da9063-watchdog"; + }; + }; +}; + &du { pinctrl-0 = <&du0_pins &du1_pins>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index 8e9eb4b704d3..38fb43d11b27 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -22,6 +22,7 @@ aliases { i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; + i2c6 = &iic3; spi0 = &qspi; spi1 = &msiof0; spi2 = &msiof1; @@ -444,6 +445,23 @@ i2c5: i2c@e6528000 { status = "disabled"; }; + iic3: i2c@e60b0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7792", + "renesas,rcar-gen2-iic", + "renesas,rmobile-iic"; + reg = <0 0xe60b0000 0 0x425>; + interrupts = ; + clocks = <&cpg CPG_MOD 926>; + dmas = <&dmac0 0x77>, <&dmac0 0x78>, + <&dmac1 0x77>, <&dmac1 0x78>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + resets = <&cpg 926>; + status = "disabled"; + }; + dmac0: dma-controller@e6700000 { compatible = "renesas,dmac-r8a7792", "renesas,rcar-dmac"; From a8d5fc0be537d49562f3d4b63390584e304ec8dc Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 3 Mar 2019 20:00:59 +0100 Subject: [PATCH 02/21] ARM: dts: alt: Add DA9063 PMIC node Add DA9063 PMIC node to the I2C bus. Signed-off-by: Marek Vasut Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-alt.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index ef7e2a837df6..e0500ec81569 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -377,6 +377,27 @@ &i2c4 { pinctrl-names = "i2c-exio4"; }; +&i2c7 { + status = "okay"; + clock-frequency = <100000>; + + pmic@58 { + compatible = "dlg,da9063"; + reg = <0x58>; + interrupt-parent = <&gpio3>; + interrupts = <31 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + + rtc { + compatible = "dlg,da9063-rtc"; + }; + + wdt { + compatible = "dlg,da9063-watchdog"; + }; + }; +}; + &vin0 { status = "okay"; pinctrl-0 = <&vin0_pins>; From 53239664e5ae353f60f37a566dbd32415a906ee8 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 20 Mar 2019 20:45:22 +0100 Subject: [PATCH 03/21] ARM: dts: ape6evm: Add NOR FLASH MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Describe the 128 MiB CFI NOR FLASH, which contains the boot loader and its environment. Signed-off-by: Geert Uytterhoeven Tested-by: Niklas Söderlund Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts index d530f451467e..b1e0d556be0a 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts @@ -166,6 +166,33 @@ &cpu0 { }; &bsc { + flash@0 { + compatible = "cfi-flash", "mtd-rom"; + reg = <0x0 0x08000000>; + bank-width = <2>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition@40000 { + label = "uboot-env"; + reg = <0x00040000 0x00040000>; + read-only; + }; + partition@80000 { + label = "flash"; + reg = <0x00080000 0x07f80000>; + }; + }; + }; + ethernet@8000000 { compatible = "smsc,lan9220", "smsc,lan9115"; reg = <0x08000000 0x1000>; From 4ec778fb0f26692419609d2f39b6f8c829ed1fb5 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 19 Mar 2019 12:21:38 +0000 Subject: [PATCH 04/21] ARM: dts: r8a77470: Add DU support This commit adds DU support to the RZ/G1C (a.k.a. r8a77470) specific device tree. Signed-off-by: Fabrizio Castro Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a77470.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index f4e232bf9d03..493cf2b3f795 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -643,6 +643,38 @@ gic: interrupt-controller@f1001000 { resets = <&cpg 408>; }; + du: display@feb00000 { + compatible = "renesas,du-r8a77470"; + reg = <0 0xfeb00000 0 0x40000>; + interrupts = , + ; + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>; + clock-names = "du.0", "du.1"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + du_out_rgb0: endpoint { + }; + }; + port@1 { + reg = <1>; + du_out_rgb1: endpoint { + }; + }; + port@2 { + reg = <2>; + du_out_lvds0: endpoint { + }; + }; + }; + }; + prr: chipid@ff000044 { compatible = "renesas,prr"; reg = <0 0xff000044 0 4>; From 26c9d79b3730dff03d1c3ea6aee3e2968d36fe15 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 19 Mar 2019 12:21:39 +0000 Subject: [PATCH 05/21] ARM: dts: iwg23s-sbc: Add HDMI support This patch adds HDMI video output support to the iwg23s board from iWave. Due to a problem with the bootloader not dealing with the configuration of one of the pins correctly, we have to use a gpio-hog for the interrupt line to make sure the pin is configured as GPIO-input when requesting the interrupt. Signed-off-by: Fabrizio Castro Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 79 +++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts index 77d18242ef59..9f9eb15a1e65 100644 --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts @@ -22,6 +22,17 @@ chosen { stdout-path = "serial1:115200n8"; }; + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&bridge_out>; + }; + }; + }; + memory@40000000 { device_type = "memory"; reg = <0 0x40000000 0 0x20000000>; @@ -80,10 +91,34 @@ &cmt0 { status = "okay"; }; +&du { + pinctrl-0 = <&du0_pins>; + pinctrl-names = "default"; + + status = "okay"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&bridge_in>; + }; + }; + }; +}; + &extal_clk { clock-frequency = <20000000>; }; +&gpio2 { + interrupt-fixup { + gpio-hog; + gpios = <29 GPIO_ACTIVE_HIGH>; + line-name = "hdmi-hpd-int"; + input; + }; +}; + &i2c3 { pinctrl-0 = <&i2c3_pins>; pinctrl-names = "default"; @@ -97,12 +132,56 @@ rtc@51 { }; }; +&i2c4 { + pinctrl-0 = <&i2c4_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <100000>; + + hdmi@39 { + compatible = "sil,sii9022"; + reg = <0x39>; + interrupt-parent = <&gpio2>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + bridge_in: endpoint { + remote-endpoint = <&du_out_rgb0>; + }; + }; + + port@1 { + reg = <1>; + bridge_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; +}; + &pfc { avb_pins: avb { groups = "avb_mdio", "avb_gmii_tx_rx"; function = "avb"; }; + du0_pins: du0 { + groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out"; + function = "du0"; + }; + + i2c4_pins: i2c4 { + groups = "i2c4_e"; + function = "i2c4"; + }; + i2c3_pins: i2c3 { groups = "i2c3_c"; function = "i2c3"; From 129ca9e185ab34e939eab91ef8f10c115fc43ba5 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 20 Mar 2019 20:44:09 +0100 Subject: [PATCH 06/21] ARM: dts: rskrza1: Add I2C support Enable the I2C bus, and add the following devices: - Two CAT9554 port expanders (8 GPIOs, interrupt not wired by default), - R1EX24016ASAS0A EEPROM. The bus also contains a MAX9856 Audio Codec, which is not yet supported. All devices (incl. the audio codec) are documented to support an I2C bus running at 400 kHz. Pinctrl is based on the RZ/A BSP. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r7s72100-rskrza1.dts | 33 ++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts b/arch/arm/boot/dts/r7s72100-rskrza1.dts index 8ee44a100e9a..60e80ecbbf68 100644 --- a/arch/arm/boot/dts/r7s72100-rskrza1.dts +++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts @@ -47,6 +47,34 @@ &extal_clk { clock-frequency = <13330000>; }; +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; + status = "okay"; + + clock-frequency = <400000>; + + io_expander1: gpio@20 { + compatible = "onnn,cat9554"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; + + io_expander2: gpio@21 { + compatible = "onnn,cat9554"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; + + eeprom@50 { + compatible = "renesas,r1ex24016", "atmel,24c16"; + reg = <0x50>; + pagesize = <16>; + }; +}; + &usb_x1_clk { clock-frequency = <48000000>; }; @@ -56,6 +84,11 @@ &rtc_x1_clk { }; &pinctrl { + /* RIIC ch3 (Port Expander, EEPROM (MAC Addr), Audio Codec) */ + i2c3_pins: i2c3 { + pinmux = , /* RIIC3SCL */ + ; /* RIIC3SDA */ + }; /* Serial Console */ scif2_pins: serial2 { From 1792a0f35319af8bf2726ed12bef5194d397d3d1 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 20 Mar 2019 20:44:10 +0100 Subject: [PATCH 07/21] ARM: dts: rskrza1: Add remaining LEDs Describe the remaining 3 LEDs, which are driven by the first CAT9554 port expander. Drop the superfluous status property from the leds node while at it. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r7s72100-rskrza1.dts | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts b/arch/arm/boot/dts/r7s72100-rskrza1.dts index 60e80ecbbf68..ff24301dc1be 100644 --- a/arch/arm/boot/dts/r7s72100-rskrza1.dts +++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts @@ -34,12 +34,23 @@ lbsc { }; leds { - status = "okay"; compatible = "gpio-leds"; led0 { gpios = <&port7 1 GPIO_ACTIVE_LOW>; }; + + led1 { + gpios = <&io_expander1 0 GPIO_ACTIVE_LOW>; + }; + + led2 { + gpios = <&io_expander1 1 GPIO_ACTIVE_LOW>; + }; + + led3 { + gpios = <&io_expander1 2 GPIO_ACTIVE_LOW>; + }; }; }; From a7586ad99e4727bcd92df374b88930400635c420 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 30 Mar 2019 08:08:11 +0100 Subject: [PATCH 08/21] ARM: dts: alt: Enable USB support Add nodes enabling internal PCI controllers to which the internal USB controllers are connected, add USB PHY node and pinmux nodes. Signed-off-by: Marek Vasut Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-alt.dts | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index e0500ec81569..0ab3d8d57f6d 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -199,6 +199,22 @@ i2cexio4: i2c-14 { }; }; +&pci0 { + status = "okay"; + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; +}; + +&pci1 { + status = "okay"; + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; +}; + +&usbphy { + status = "okay"; +}; + &du { pinctrl-0 = <&du_pins>; pinctrl-names = "default"; @@ -293,6 +309,16 @@ sdhi1_pins_uhs: sd1_uhs { function = "sdhi1"; power-source = <1800>; }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + + usb1_pins: usb1 { + groups = "usb1"; + function = "usb1"; + }; }; &cmt0 { From f408170d1829779188aa774ec711bf267349b13b Mon Sep 17 00:00:00 2001 From: Cao Van Dong Date: Thu, 11 Apr 2019 16:54:03 +0900 Subject: [PATCH 09/21] ARM: dts: r8a77470: Add HSCIF support Add hscif{0|1|2} nodes to dtsi for HSCIF support on the RZ/G1C (r8a77470) SoC. Signed-off-by: Cao Van Dong Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a77470.dtsi | 48 +++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 493cf2b3f795..60bd79fc35f7 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -588,6 +588,54 @@ scif5: serial@e6ee8000 { status = "disabled"; }; + hscif0: serial@e62c0000 { + compatible = "renesas,hscif-r8a77470", + "renesas,rcar-gen2-hscif", "renesas,hscif"; + reg = <0 0xe62c0000 0 0x60>; + interrupts = ; + clocks = <&cpg CPG_MOD 717>, + <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x39>, <&dmac0 0x3a>, + <&dmac1 0x39>, <&dmac1 0x3a>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 717>; + status = "disabled"; + }; + + hscif1: serial@e62c8000 { + compatible = "renesas,hscif-r8a77470", + "renesas,rcar-gen2-hscif", "renesas,hscif"; + reg = <0 0xe62c8000 0 0x60>; + interrupts = ; + clocks = <&cpg CPG_MOD 716>, + <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, + <&dmac1 0x4d>, <&dmac1 0x4e>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 716>; + status = "disabled"; + }; + + hscif2: serial@e62d0000 { + compatible = "renesas,hscif-r8a77470", + "renesas,rcar-gen2-hscif", "renesas,hscif"; + reg = <0 0xe62d0000 0 0x60>; + interrupts = ; + clocks = <&cpg CPG_MOD 713>, + <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, + <&dmac1 0x3b>, <&dmac1 0x3c>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 713>; + status = "disabled"; + }; + sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a77470", "renesas,rcar-gen2-sdhi"; From 3d59e55ef864f5b42bac865912df4aad56d7a67e Mon Sep 17 00:00:00 2001 From: Cao Van Dong Date: Thu, 11 Apr 2019 16:54:05 +0900 Subject: [PATCH 10/21] ARM: dts: r8a77470: Add PWM support Add pwm{0|1|2|3|4|5|6} nodes to dtsi for PWM support on the RZ/G1C (r8a77470) SoC. Signed-off-by: Cao Van Dong Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a77470.dtsi | 70 +++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 60bd79fc35f7..c9f6e6b11e24 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -636,6 +636,76 @@ hscif2: serial@e62d0000 { status = "disabled"; }; + pwm0: pwm@e6e30000 { + compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; + reg = <0 0xe6e30000 0 0x8>; + clocks = <&cpg CPG_MOD 523>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 523>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm1: pwm@e6e31000 { + compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; + reg = <0 0xe6e31000 0 0x8>; + clocks = <&cpg CPG_MOD 523>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 523>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm2: pwm@e6e32000 { + compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; + reg = <0 0xe6e32000 0 0x8>; + clocks = <&cpg CPG_MOD 523>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 523>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm3: pwm@e6e33000 { + compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; + reg = <0 0xe6e33000 0 0x8>; + clocks = <&cpg CPG_MOD 523>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 523>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm4: pwm@e6e34000 { + compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; + reg = <0 0xe6e34000 0 0x8>; + clocks = <&cpg CPG_MOD 523>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 523>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm5: pwm@e6e35000 { + compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; + reg = <0 0xe6e35000 0 0x8>; + clocks = <&cpg CPG_MOD 523>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 523>; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm6: pwm@e6e36000 { + compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; + reg = <0 0xe6e36000 0 0x8>; + clocks = <&cpg CPG_MOD 523>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 523>; + #pwm-cells = <2>; + status = "disabled"; + }; + sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a77470", "renesas,rcar-gen2-sdhi"; From 1631b58c7ef690869dcd4b853bf6d06ba54e74d0 Mon Sep 17 00:00:00 2001 From: Cao Van Dong Date: Tue, 9 Apr 2019 17:51:46 +0900 Subject: [PATCH 11/21] ARM: dts: r8a77470: Add VIN support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add vin{0|1} nodes to dtsi for VIN support on the RZ/G1C (r8a77470) SoC. Signed-off-by: Cao Van Dong Reviewed-by: Niklas Söderlund Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a77470.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index c9f6e6b11e24..2e02ff4bd4f7 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -706,6 +706,28 @@ pwm6: pwm@e6e36000 { status = "disabled"; }; + vin0: video@e6ef0000 { + compatible = "renesas,vin-r8a77470", + "renesas,rcar-gen2-vin"; + reg = <0 0xe6ef0000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 811>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 811>; + status = "disabled"; + }; + + vin1: video@e6ef1000 { + compatible = "renesas,vin-r8a77470", + "renesas,rcar-gen2-vin"; + reg = <0 0xe6ef1000 0 0x1000>; + interrupts = ; + clocks = <&cpg CPG_MOD 810>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 810>; + status = "disabled"; + }; + sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a77470", "renesas,rcar-gen2-sdhi"; From 1a675db44002ed9674d6e534b1400a9d756ef34b Mon Sep 17 00:00:00 2001 From: Biju Das Date: Wed, 10 Apr 2019 15:48:45 +0100 Subject: [PATCH 12/21] ARM: dts: r8a77470: Add USB PHY DT support Define the r8a77470 generic part of the USB PHY device node. Signed-off-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a77470.dtsi | 56 +++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 2e02ff4bd4f7..eb7c53ed077a 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -325,6 +325,42 @@ i2c4: i2c@e6520000 { status = "disabled"; }; + usbphy0: usb-phy@e6590100 { + compatible = "renesas,usb-phy-r8a77470", + "renesas,rcar-gen2-usb-phy"; + reg = <0 0xe6590100 0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cpg CPG_MOD 704>; + clock-names = "usbhs"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 704>; + status = "disabled"; + + usb0: usb-channel@0 { + reg = <0>; + #phy-cells = <1>; + }; + }; + + usbphy1: usb-phy@e6598100 { + compatible = "renesas,usb-phy-r8a77470", + "renesas,rcar-gen2-usb-phy"; + reg = <0 0xe6598100 0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cpg CPG_MOD 706>; + clock-names = "usbhs"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 706>; + status = "disabled"; + + usb1: usb-channel@0 { + reg = <0>; + #phy-cells = <1>; + }; + }; + usb_dmac00: dma-controller@e65a0000 { compatible = "renesas,r8a77470-usb-dmac", "renesas,usb-dmac"; @@ -728,6 +764,26 @@ vin1: video@e6ef1000 { status = "disabled"; }; + usb2_phy0: usb-phy@ee080200 { + compatible = "renesas,usb2-phy-r8a77470"; + reg = <0 0xee080200 0 0x700>; + clocks = <&cpg CPG_MOD 703>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 703>; + #phy-cells = <0>; + status = "disabled"; + }; + + usb2_phy1: usb-phy@ee0c0200 { + compatible = "renesas,usb2-phy-r8a77470"; + reg = <0 0xee0c0200 0 0x700>; + clocks = <&cpg CPG_MOD 705>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 705>; + #phy-cells = <0>; + status = "disabled"; + }; + sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a77470", "renesas,rcar-gen2-sdhi"; From e18cfb6e0418e099e42c9fb697dfba24096c90ca Mon Sep 17 00:00:00 2001 From: Biju Das Date: Wed, 10 Apr 2019 15:48:46 +0100 Subject: [PATCH 13/21] ARM: dts: iwg23s-sbc: Enable USB Phy[01] Enable USB phy[01] on iWave iwg23s sbc based on RZ/G1C SoC. Signed-off-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 32 +++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts index 9f9eb15a1e65..7ae7ee1ed199 100644 --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts @@ -214,6 +214,16 @@ sdhi2_pins_uhs: sd2_uhs { function = "sdhi2"; power-source = <1800>; }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + + usb1_pins: usb1 { + groups = "usb1"; + function = "usb1"; + }; }; &qspi0 { @@ -274,3 +284,25 @@ &sdhi2 { sd-uhs-sdr50; status = "okay"; }; + +&usb2_phy0 { + status = "okay"; +}; + +&usb2_phy1 { + status = "okay"; +}; + +&usbphy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&usbphy1 { + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; From ce5940798cf1eb1ba70e94702cbb334ca370f96b Mon Sep 17 00:00:00 2001 From: Biju Das Date: Wed, 10 Apr 2019 15:48:47 +0100 Subject: [PATCH 14/21] ARM: dts: r8a77470: Add USB2.0 Host (EHCI/OHCI) device Define the r8a77470 generic part of the USB2.0 Host Controller device nodes (ehci[01]/ohci[01]). Signed-off-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a77470.dtsi | 50 +++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index eb7c53ed077a..0ad1ec092305 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -764,6 +764,31 @@ vin1: video@e6ef1000 { status = "disabled"; }; + ohci0: usb@ee080000 { + compatible = "generic-ohci"; + reg = <0 0xee080000 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 703>; + phys = <&usb0 0>, <&usb2_phy0>; + phy-names = "usb"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 703>; + status = "disabled"; + }; + + ehci0: usb@ee080100 { + compatible = "generic-ehci"; + reg = <0 0xee080100 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 703>; + phys = <&usb0 0>, <&usb2_phy0>; + phy-names = "usb"; + companion = <&ohci0>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 703>; + status = "disabled"; + }; + usb2_phy0: usb-phy@ee080200 { compatible = "renesas,usb2-phy-r8a77470"; reg = <0 0xee080200 0 0x700>; @@ -774,6 +799,31 @@ usb2_phy0: usb-phy@ee080200 { status = "disabled"; }; + ohci1: usb@ee0c0000 { + compatible = "generic-ohci"; + reg = <0 0xee0c0000 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 705>; + phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>; + phy-names = "usb"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 705>; + status = "disabled"; + }; + + ehci1: usb@ee0c0100 { + compatible = "generic-ehci"; + reg = <0 0xee0c0100 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 705>; + phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>; + phy-names = "usb"; + companion = <&ohci1>; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 705>; + status = "disabled"; + }; + usb2_phy1: usb-phy@ee0c0200 { compatible = "renesas,usb2-phy-r8a77470"; reg = <0 0xee0c0200 0 0x700>; From 034484c4a3c77113304c8b5e1b35a9fad048274e Mon Sep 17 00:00:00 2001 From: Biju Das Date: Wed, 10 Apr 2019 15:48:48 +0100 Subject: [PATCH 15/21] ARM: dts: iwg23s-sbc: Enable USB USB2.0 Host Enable USB2.0 host on the iwg23s sbc. Signed-off-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts index 7ae7ee1ed199..366832cc92bc 100644 --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts @@ -106,6 +106,10 @@ endpoint { }; }; +&ehci1 { + status = "okay"; +}; + &extal_clk { clock-frequency = <20000000>; }; @@ -166,6 +170,10 @@ bridge_out: endpoint { }; }; +&ohci1 { + status = "okay"; +}; + &pfc { avb_pins: avb { groups = "avb_mdio", "avb_gmii_tx_rx"; From 307ca5cf4778b6bf0d2a025b0e4f653742214de8 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Wed, 10 Apr 2019 15:48:49 +0100 Subject: [PATCH 16/21] ARM: dts: r8a77470: Add HSUSB device nodes Define the r8a77470 generic part of the HSUSB0/1 device nodes. Currently the renesas_usbhs driver doesn't handle multiple phys and we don't have a proper hardware to validate such driver changes. So for hsusb1 it is assumed that usbphy0 will be enabled by either channel0 host or device. In future, if any boards support hsusb1, we will need to add multiple phy support in the renesas_usbhs driver and override the board dts to enable the same. Signed-off-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a77470.dtsi | 35 +++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 0ad1ec092305..56cb10b42ed9 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -325,6 +325,23 @@ i2c4: i2c@e6520000 { status = "disabled"; }; + hsusb0: hsusb@e6590000 { + compatible = "renesas,usbhs-r8a77470", + "renesas,rcar-gen2-usbhs"; + reg = <0 0xe6590000 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 704>; + dmas = <&usb_dmac00 0>, <&usb_dmac00 1>, + <&usb_dmac10 0>, <&usb_dmac10 1>; + dma-names = "ch0", "ch1", "ch2", "ch3"; + renesas,buswait = <4>; + phys = <&usb0 1>; + phy-names = "usb"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 704>; + status = "disabled"; + }; + usbphy0: usb-phy@e6590100 { compatible = "renesas,usb-phy-r8a77470", "renesas,rcar-gen2-usb-phy"; @@ -343,6 +360,24 @@ usb0: usb-channel@0 { }; }; + hsusb1: hsusb@e6598000 { + compatible = "renesas,usbhs-r8a77470", + "renesas,rcar-gen2-usbhs"; + reg = <0 0xe6598000 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 706>; + dmas = <&usb_dmac01 0>, <&usb_dmac01 1>, + <&usb_dmac11 0>, <&usb_dmac11 1>; + dma-names = "ch0", "ch1", "ch2", "ch3"; + renesas,buswait = <4>; + /* We need to turn on usbphy0 to make usbphy1 to work */ + phys = <&usb1 1>; + phy-names = "usb"; + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; + resets = <&cpg 706>; + status = "disabled"; + }; + usbphy1: usb-phy@e6598100 { compatible = "renesas,usb-phy-r8a77470", "renesas,rcar-gen2-usb-phy"; From 0725a5478e3b7080666512e6889c94bc361e7b88 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Wed, 10 Apr 2019 15:48:50 +0100 Subject: [PATCH 17/21] ARM: dts: iwg23s-sbc: Enable HS-USB Enable HS-USB device for the iWave SBC based on RZ/G1C. Signed-off-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts index 366832cc92bc..2840eb0d6fd4 100644 --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts @@ -123,6 +123,10 @@ interrupt-fixup { }; }; +&hsusb0 { + status = "okay"; +}; + &i2c3 { pinctrl-0 = <&i2c3_pins>; pinctrl-names = "default"; From 94b42a96dad89da7602828bab481feef70b76ccb Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 18 Apr 2019 00:12:04 +0900 Subject: [PATCH 18/21] ARM: dts: kzm9d: Add rw parameter to bootargs Add rw as bootargs parameter to make the KZM9D board bootargs match other boards from Renesas. No need to be special. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/boot/dts/emev2-kzm9d.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts index 1bb8e5c9d029..abfff54d6de5 100644 --- a/arch/arm/boot/dts/emev2-kzm9d.dts +++ b/arch/arm/boot/dts/emev2-kzm9d.dts @@ -25,7 +25,7 @@ aliases { }; chosen { - bootargs = "ignore_loglevel root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; stdout-path = "serial1:115200n8"; }; From 44861e54861ef99f4bec4b084eeeee5010df7915 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 18 Apr 2019 00:12:14 +0900 Subject: [PATCH 19/21] ARM: dts: bockw: Reorder bootargs Reorder bootargs parameters to make the BockW board bootargs match other boards from Renesas. No need to be special. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7778-bockw.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts index cecb22924ec4..0b49956069fc 100644 --- a/arch/arm/boot/dts/r8a7778-bockw.dts +++ b/arch/arm/boot/dts/r8a7778-bockw.dts @@ -25,7 +25,7 @@ aliases { }; chosen { - bootargs = "ignore_loglevel ip=dhcp root=/dev/nfs rw"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; stdout-path = "serial0:115200n8"; }; From ee8b7420feaecffa56bf2784fa4b6a6038b390f2 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 18 Apr 2019 00:12:23 +0900 Subject: [PATCH 20/21] ARM: dts: marzen: Add rw to bootargs and use ip=dhcp Add rw as bootargs parameter and change from ip=on to ip=dhcp to make the Marzen board bootargs match other boards from Renesas. No need to be special. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779-marzen.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts index abc14e7a4c93..d4bee1ec9044 100644 --- a/arch/arm/boot/dts/r8a7779-marzen.dts +++ b/arch/arm/boot/dts/r8a7779-marzen.dts @@ -21,7 +21,7 @@ aliases { }; chosen { - bootargs = "ignore_loglevel root=/dev/nfs ip=on"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; stdout-path = "serial0:115200n8"; }; From 0750e8344eb7c48f82a54920172a5d0f78eb223b Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 18 Apr 2019 00:12:32 +0900 Subject: [PATCH 21/21] ARM: dts: ape6evm: Reorder bootargs Reorder bootargs parameters to make the APE6EVM board bootargs match other boards from Renesas. No need to be special. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts index b1e0d556be0a..f70f4a3e5c43 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts @@ -19,7 +19,7 @@ aliases { }; chosen { - bootargs = "ignore_loglevel root=/dev/nfs ip=dhcp rw"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; stdout-path = "serial0:115200n8"; };