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IB/hfi1: Reduce excessive aspm inlines
Uninline the aspm API since it increases code space for no reason. Move the aspm module param to the new aspm C file. Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
This commit is contained in:
Michael J. Ruhl
Jason Gunthorpe
parent
2b0ad2da8f
commit
bf3b1e0ce0
@ -10,6 +10,7 @@ obj-$(CONFIG_INFINIBAND_HFI1) += hfi1.o
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hfi1-y := \
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affinity.o \
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aspm.o \
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chip.o \
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device.o \
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driver.o \
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270
drivers/infiniband/hw/hfi1/aspm.c
Normal file
270
drivers/infiniband/hw/hfi1/aspm.c
Normal file
@ -0,0 +1,270 @@
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// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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/*
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* Copyright(c) 2019 Intel Corporation.
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*
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*/
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#include "aspm.h"
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/* Time after which the timer interrupt will re-enable ASPM */
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#define ASPM_TIMER_MS 1000
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/* Time for which interrupts are ignored after a timer has been scheduled */
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#define ASPM_RESCHED_TIMER_MS (ASPM_TIMER_MS / 2)
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/* Two interrupts within this time trigger ASPM disable */
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#define ASPM_TRIGGER_MS 1
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#define ASPM_TRIGGER_NS (ASPM_TRIGGER_MS * 1000 * 1000ull)
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#define ASPM_L1_SUPPORTED(reg) \
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((((reg) & PCI_EXP_LNKCAP_ASPMS) >> 10) & 0x2)
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uint aspm_mode = ASPM_MODE_DISABLED;
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module_param_named(aspm, aspm_mode, uint, 0444);
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MODULE_PARM_DESC(aspm, "PCIe ASPM: 0: disable, 1: enable, 2: dynamic");
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static bool aspm_hw_l1_supported(struct hfi1_devdata *dd)
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{
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struct pci_dev *parent = dd->pcidev->bus->self;
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u32 up, dn;
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/*
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* If the driver does not have access to the upstream component,
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* it cannot support ASPM L1 at all.
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*/
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if (!parent)
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return false;
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pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn);
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dn = ASPM_L1_SUPPORTED(dn);
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pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &up);
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up = ASPM_L1_SUPPORTED(up);
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/* ASPM works on A-step but is reported as not supported */
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return (!!dn || is_ax(dd)) && !!up;
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}
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/* Set L1 entrance latency for slower entry to L1 */
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static void aspm_hw_set_l1_ent_latency(struct hfi1_devdata *dd)
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{
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u32 l1_ent_lat = 0x4u;
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u32 reg32;
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pci_read_config_dword(dd->pcidev, PCIE_CFG_REG_PL3, ®32);
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reg32 &= ~PCIE_CFG_REG_PL3_L1_ENT_LATENCY_SMASK;
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reg32 |= l1_ent_lat << PCIE_CFG_REG_PL3_L1_ENT_LATENCY_SHIFT;
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pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL3, reg32);
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}
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static void aspm_hw_enable_l1(struct hfi1_devdata *dd)
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{
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struct pci_dev *parent = dd->pcidev->bus->self;
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/*
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* If the driver does not have access to the upstream component,
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* it cannot support ASPM L1 at all.
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*/
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if (!parent)
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return;
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/* Enable ASPM L1 first in upstream component and then downstream */
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pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL,
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PCI_EXP_LNKCTL_ASPMC,
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PCI_EXP_LNKCTL_ASPM_L1);
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pcie_capability_clear_and_set_word(dd->pcidev, PCI_EXP_LNKCTL,
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PCI_EXP_LNKCTL_ASPMC,
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PCI_EXP_LNKCTL_ASPM_L1);
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}
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void aspm_hw_disable_l1(struct hfi1_devdata *dd)
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{
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struct pci_dev *parent = dd->pcidev->bus->self;
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/* Disable ASPM L1 first in downstream component and then upstream */
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pcie_capability_clear_and_set_word(dd->pcidev, PCI_EXP_LNKCTL,
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PCI_EXP_LNKCTL_ASPMC, 0x0);
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if (parent)
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pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL,
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PCI_EXP_LNKCTL_ASPMC, 0x0);
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}
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static void aspm_enable(struct hfi1_devdata *dd)
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{
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if (dd->aspm_enabled || aspm_mode == ASPM_MODE_DISABLED ||
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!dd->aspm_supported)
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return;
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aspm_hw_enable_l1(dd);
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dd->aspm_enabled = true;
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}
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static void aspm_disable(struct hfi1_devdata *dd)
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{
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if (!dd->aspm_enabled || aspm_mode == ASPM_MODE_ENABLED)
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return;
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aspm_hw_disable_l1(dd);
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dd->aspm_enabled = false;
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}
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static void aspm_disable_inc(struct hfi1_devdata *dd)
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{
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unsigned long flags;
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spin_lock_irqsave(&dd->aspm_lock, flags);
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aspm_disable(dd);
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atomic_inc(&dd->aspm_disabled_cnt);
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spin_unlock_irqrestore(&dd->aspm_lock, flags);
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}
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static void aspm_enable_dec(struct hfi1_devdata *dd)
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{
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unsigned long flags;
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spin_lock_irqsave(&dd->aspm_lock, flags);
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if (atomic_dec_and_test(&dd->aspm_disabled_cnt))
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aspm_enable(dd);
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spin_unlock_irqrestore(&dd->aspm_lock, flags);
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}
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/* ASPM processing for each receive context interrupt */
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void __aspm_ctx_disable(struct hfi1_ctxtdata *rcd)
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{
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bool restart_timer;
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bool close_interrupts;
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unsigned long flags;
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ktime_t now, prev;
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spin_lock_irqsave(&rcd->aspm_lock, flags);
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/* PSM contexts are open */
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if (!rcd->aspm_intr_enable)
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goto unlock;
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prev = rcd->aspm_ts_last_intr;
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now = ktime_get();
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rcd->aspm_ts_last_intr = now;
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/* An interrupt pair close together in time */
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close_interrupts = ktime_to_ns(ktime_sub(now, prev)) < ASPM_TRIGGER_NS;
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/* Don't push out our timer till this much time has elapsed */
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restart_timer = ktime_to_ns(ktime_sub(now, rcd->aspm_ts_timer_sched)) >
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ASPM_RESCHED_TIMER_MS * NSEC_PER_MSEC;
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restart_timer = restart_timer && close_interrupts;
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/* Disable ASPM and schedule timer */
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if (rcd->aspm_enabled && close_interrupts) {
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aspm_disable_inc(rcd->dd);
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rcd->aspm_enabled = false;
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restart_timer = true;
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}
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if (restart_timer) {
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mod_timer(&rcd->aspm_timer,
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jiffies + msecs_to_jiffies(ASPM_TIMER_MS));
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rcd->aspm_ts_timer_sched = now;
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}
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unlock:
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spin_unlock_irqrestore(&rcd->aspm_lock, flags);
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}
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/* Timer function for re-enabling ASPM in the absence of interrupt activity */
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static void aspm_ctx_timer_function(struct timer_list *t)
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{
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struct hfi1_ctxtdata *rcd = from_timer(rcd, t, aspm_timer);
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unsigned long flags;
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spin_lock_irqsave(&rcd->aspm_lock, flags);
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aspm_enable_dec(rcd->dd);
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rcd->aspm_enabled = true;
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spin_unlock_irqrestore(&rcd->aspm_lock, flags);
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}
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/*
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* Disable interrupt processing for verbs contexts when PSM or VNIC contexts
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* are open.
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*/
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void aspm_disable_all(struct hfi1_devdata *dd)
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{
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struct hfi1_ctxtdata *rcd;
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unsigned long flags;
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u16 i;
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for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
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rcd = hfi1_rcd_get_by_index(dd, i);
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if (rcd) {
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del_timer_sync(&rcd->aspm_timer);
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spin_lock_irqsave(&rcd->aspm_lock, flags);
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rcd->aspm_intr_enable = false;
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spin_unlock_irqrestore(&rcd->aspm_lock, flags);
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hfi1_rcd_put(rcd);
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}
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}
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aspm_disable(dd);
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atomic_set(&dd->aspm_disabled_cnt, 0);
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}
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/* Re-enable interrupt processing for verbs contexts */
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void aspm_enable_all(struct hfi1_devdata *dd)
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{
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struct hfi1_ctxtdata *rcd;
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unsigned long flags;
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u16 i;
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aspm_enable(dd);
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if (aspm_mode != ASPM_MODE_DYNAMIC)
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return;
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for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
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rcd = hfi1_rcd_get_by_index(dd, i);
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if (rcd) {
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spin_lock_irqsave(&rcd->aspm_lock, flags);
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rcd->aspm_intr_enable = true;
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rcd->aspm_enabled = true;
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spin_unlock_irqrestore(&rcd->aspm_lock, flags);
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hfi1_rcd_put(rcd);
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}
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}
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}
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static void aspm_ctx_init(struct hfi1_ctxtdata *rcd)
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{
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spin_lock_init(&rcd->aspm_lock);
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timer_setup(&rcd->aspm_timer, aspm_ctx_timer_function, 0);
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rcd->aspm_intr_supported = rcd->dd->aspm_supported &&
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aspm_mode == ASPM_MODE_DYNAMIC &&
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rcd->ctxt < rcd->dd->first_dyn_alloc_ctxt;
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}
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void aspm_init(struct hfi1_devdata *dd)
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{
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struct hfi1_ctxtdata *rcd;
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u16 i;
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spin_lock_init(&dd->aspm_lock);
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dd->aspm_supported = aspm_hw_l1_supported(dd);
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for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
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rcd = hfi1_rcd_get_by_index(dd, i);
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if (rcd)
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aspm_ctx_init(rcd);
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hfi1_rcd_put(rcd);
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}
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/* Start with ASPM disabled */
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aspm_hw_set_l1_ent_latency(dd);
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dd->aspm_enabled = false;
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aspm_hw_disable_l1(dd);
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/* Now turn on ASPM if configured */
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aspm_enable_all(dd);
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}
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void aspm_exit(struct hfi1_devdata *dd)
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{
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aspm_disable_all(dd);
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/* Turn on ASPM on exit to conserve power */
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aspm_enable(dd);
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}
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@ -57,266 +57,20 @@ enum aspm_mode {
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ASPM_MODE_DYNAMIC = 2, /* ASPM enabled/disabled dynamically */
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};
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/* Time after which the timer interrupt will re-enable ASPM */
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#define ASPM_TIMER_MS 1000
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/* Time for which interrupts are ignored after a timer has been scheduled */
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#define ASPM_RESCHED_TIMER_MS (ASPM_TIMER_MS / 2)
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/* Two interrupts within this time trigger ASPM disable */
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#define ASPM_TRIGGER_MS 1
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#define ASPM_TRIGGER_NS (ASPM_TRIGGER_MS * 1000 * 1000ull)
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#define ASPM_L1_SUPPORTED(reg) \
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(((reg & PCI_EXP_LNKCAP_ASPMS) >> 10) & 0x2)
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void aspm_init(struct hfi1_devdata *dd);
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void aspm_exit(struct hfi1_devdata *dd);
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void aspm_hw_disable_l1(struct hfi1_devdata *dd);
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void __aspm_ctx_disable(struct hfi1_ctxtdata *rcd);
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void aspm_disable_all(struct hfi1_devdata *dd);
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void aspm_enable_all(struct hfi1_devdata *dd);
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static inline bool aspm_hw_l1_supported(struct hfi1_devdata *dd)
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{
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struct pci_dev *parent = dd->pcidev->bus->self;
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u32 up, dn;
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/*
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* If the driver does not have access to the upstream component,
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* it cannot support ASPM L1 at all.
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*/
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if (!parent)
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return false;
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pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn);
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dn = ASPM_L1_SUPPORTED(dn);
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pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &up);
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up = ASPM_L1_SUPPORTED(up);
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/* ASPM works on A-step but is reported as not supported */
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return (!!dn || is_ax(dd)) && !!up;
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}
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/* Set L1 entrance latency for slower entry to L1 */
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static inline void aspm_hw_set_l1_ent_latency(struct hfi1_devdata *dd)
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{
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u32 l1_ent_lat = 0x4u;
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u32 reg32;
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pci_read_config_dword(dd->pcidev, PCIE_CFG_REG_PL3, ®32);
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reg32 &= ~PCIE_CFG_REG_PL3_L1_ENT_LATENCY_SMASK;
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reg32 |= l1_ent_lat << PCIE_CFG_REG_PL3_L1_ENT_LATENCY_SHIFT;
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pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL3, reg32);
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}
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static inline void aspm_hw_enable_l1(struct hfi1_devdata *dd)
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{
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struct pci_dev *parent = dd->pcidev->bus->self;
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/*
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* If the driver does not have access to the upstream component,
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* it cannot support ASPM L1 at all.
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*/
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if (!parent)
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return;
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/* Enable ASPM L1 first in upstream component and then downstream */
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pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL,
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PCI_EXP_LNKCTL_ASPMC,
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PCI_EXP_LNKCTL_ASPM_L1);
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pcie_capability_clear_and_set_word(dd->pcidev, PCI_EXP_LNKCTL,
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PCI_EXP_LNKCTL_ASPMC,
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PCI_EXP_LNKCTL_ASPM_L1);
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}
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static inline void aspm_hw_disable_l1(struct hfi1_devdata *dd)
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{
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struct pci_dev *parent = dd->pcidev->bus->self;
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/* Disable ASPM L1 first in downstream component and then upstream */
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pcie_capability_clear_and_set_word(dd->pcidev, PCI_EXP_LNKCTL,
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PCI_EXP_LNKCTL_ASPMC, 0x0);
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if (parent)
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pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL,
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PCI_EXP_LNKCTL_ASPMC, 0x0);
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}
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static inline void aspm_enable(struct hfi1_devdata *dd)
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{
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if (dd->aspm_enabled || aspm_mode == ASPM_MODE_DISABLED ||
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!dd->aspm_supported)
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return;
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aspm_hw_enable_l1(dd);
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dd->aspm_enabled = true;
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}
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static inline void aspm_disable(struct hfi1_devdata *dd)
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{
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if (!dd->aspm_enabled || aspm_mode == ASPM_MODE_ENABLED)
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return;
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aspm_hw_disable_l1(dd);
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dd->aspm_enabled = false;
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}
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static inline void aspm_disable_inc(struct hfi1_devdata *dd)
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{
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unsigned long flags;
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spin_lock_irqsave(&dd->aspm_lock, flags);
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aspm_disable(dd);
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atomic_inc(&dd->aspm_disabled_cnt);
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spin_unlock_irqrestore(&dd->aspm_lock, flags);
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}
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static inline void aspm_enable_dec(struct hfi1_devdata *dd)
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{
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unsigned long flags;
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spin_lock_irqsave(&dd->aspm_lock, flags);
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if (atomic_dec_and_test(&dd->aspm_disabled_cnt))
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aspm_enable(dd);
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spin_unlock_irqrestore(&dd->aspm_lock, flags);
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}
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/* ASPM processing for each receive context interrupt */
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static inline void aspm_ctx_disable(struct hfi1_ctxtdata *rcd)
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{
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bool restart_timer;
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bool close_interrupts;
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unsigned long flags;
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ktime_t now, prev;
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/* Quickest exit for minimum impact */
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if (!rcd->aspm_intr_supported)
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if (likely(!rcd->aspm_intr_supported))
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return;
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spin_lock_irqsave(&rcd->aspm_lock, flags);
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/* PSM contexts are open */
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if (!rcd->aspm_intr_enable)
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goto unlock;
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prev = rcd->aspm_ts_last_intr;
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now = ktime_get();
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rcd->aspm_ts_last_intr = now;
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/* An interrupt pair close together in time */
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close_interrupts = ktime_to_ns(ktime_sub(now, prev)) < ASPM_TRIGGER_NS;
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/* Don't push out our timer till this much time has elapsed */
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restart_timer = ktime_to_ns(ktime_sub(now, rcd->aspm_ts_timer_sched)) >
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ASPM_RESCHED_TIMER_MS * NSEC_PER_MSEC;
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restart_timer = restart_timer && close_interrupts;
|
||||
|
||||
/* Disable ASPM and schedule timer */
|
||||
if (rcd->aspm_enabled && close_interrupts) {
|
||||
aspm_disable_inc(rcd->dd);
|
||||
rcd->aspm_enabled = false;
|
||||
restart_timer = true;
|
||||
}
|
||||
|
||||
if (restart_timer) {
|
||||
mod_timer(&rcd->aspm_timer,
|
||||
jiffies + msecs_to_jiffies(ASPM_TIMER_MS));
|
||||
rcd->aspm_ts_timer_sched = now;
|
||||
}
|
||||
unlock:
|
||||
spin_unlock_irqrestore(&rcd->aspm_lock, flags);
|
||||
}
|
||||
|
||||
/* Timer function for re-enabling ASPM in the absence of interrupt activity */
|
||||
static inline void aspm_ctx_timer_function(struct timer_list *t)
|
||||
{
|
||||
struct hfi1_ctxtdata *rcd = from_timer(rcd, t, aspm_timer);
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&rcd->aspm_lock, flags);
|
||||
aspm_enable_dec(rcd->dd);
|
||||
rcd->aspm_enabled = true;
|
||||
spin_unlock_irqrestore(&rcd->aspm_lock, flags);
|
||||
}
|
||||
|
||||
/*
|
||||
* Disable interrupt processing for verbs contexts when PSM or VNIC contexts
|
||||
* are open.
|
||||
*/
|
||||
static inline void aspm_disable_all(struct hfi1_devdata *dd)
|
||||
{
|
||||
struct hfi1_ctxtdata *rcd;
|
||||
unsigned long flags;
|
||||
u16 i;
|
||||
|
||||
for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
|
||||
rcd = hfi1_rcd_get_by_index(dd, i);
|
||||
if (rcd) {
|
||||
del_timer_sync(&rcd->aspm_timer);
|
||||
spin_lock_irqsave(&rcd->aspm_lock, flags);
|
||||
rcd->aspm_intr_enable = false;
|
||||
spin_unlock_irqrestore(&rcd->aspm_lock, flags);
|
||||
hfi1_rcd_put(rcd);
|
||||
}
|
||||
}
|
||||
|
||||
aspm_disable(dd);
|
||||
atomic_set(&dd->aspm_disabled_cnt, 0);
|
||||
}
|
||||
|
||||
/* Re-enable interrupt processing for verbs contexts */
|
||||
static inline void aspm_enable_all(struct hfi1_devdata *dd)
|
||||
{
|
||||
struct hfi1_ctxtdata *rcd;
|
||||
unsigned long flags;
|
||||
u16 i;
|
||||
|
||||
aspm_enable(dd);
|
||||
|
||||
if (aspm_mode != ASPM_MODE_DYNAMIC)
|
||||
return;
|
||||
|
||||
for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
|
||||
rcd = hfi1_rcd_get_by_index(dd, i);
|
||||
if (rcd) {
|
||||
spin_lock_irqsave(&rcd->aspm_lock, flags);
|
||||
rcd->aspm_intr_enable = true;
|
||||
rcd->aspm_enabled = true;
|
||||
spin_unlock_irqrestore(&rcd->aspm_lock, flags);
|
||||
hfi1_rcd_put(rcd);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static inline void aspm_ctx_init(struct hfi1_ctxtdata *rcd)
|
||||
{
|
||||
spin_lock_init(&rcd->aspm_lock);
|
||||
timer_setup(&rcd->aspm_timer, aspm_ctx_timer_function, 0);
|
||||
rcd->aspm_intr_supported = rcd->dd->aspm_supported &&
|
||||
aspm_mode == ASPM_MODE_DYNAMIC &&
|
||||
rcd->ctxt < rcd->dd->first_dyn_alloc_ctxt;
|
||||
}
|
||||
|
||||
static inline void aspm_init(struct hfi1_devdata *dd)
|
||||
{
|
||||
struct hfi1_ctxtdata *rcd;
|
||||
u16 i;
|
||||
|
||||
spin_lock_init(&dd->aspm_lock);
|
||||
dd->aspm_supported = aspm_hw_l1_supported(dd);
|
||||
|
||||
for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
|
||||
rcd = hfi1_rcd_get_by_index(dd, i);
|
||||
if (rcd)
|
||||
aspm_ctx_init(rcd);
|
||||
hfi1_rcd_put(rcd);
|
||||
}
|
||||
|
||||
/* Start with ASPM disabled */
|
||||
aspm_hw_set_l1_ent_latency(dd);
|
||||
dd->aspm_enabled = false;
|
||||
aspm_hw_disable_l1(dd);
|
||||
|
||||
/* Now turn on ASPM if configured */
|
||||
aspm_enable_all(dd);
|
||||
}
|
||||
|
||||
static inline void aspm_exit(struct hfi1_devdata *dd)
|
||||
{
|
||||
aspm_disable_all(dd);
|
||||
|
||||
/* Turn on ASPM on exit to conserve power */
|
||||
aspm_enable(dd);
|
||||
__aspm_ctx_disable(rcd);
|
||||
}
|
||||
|
||||
#endif /* _ASPM_H */
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright(c) 2015 - 2018 Intel Corporation.
|
||||
* Copyright(c) 2015 - 2019 Intel Corporation.
|
||||
*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
@ -450,10 +450,6 @@ static int hfi1_pcie_caps;
|
||||
module_param_named(pcie_caps, hfi1_pcie_caps, int, 0444);
|
||||
MODULE_PARM_DESC(pcie_caps, "Max PCIe tuning: Payload (0..3), ReadReq (4..7)");
|
||||
|
||||
uint aspm_mode = ASPM_MODE_DISABLED;
|
||||
module_param_named(aspm, aspm_mode, uint, 0444);
|
||||
MODULE_PARM_DESC(aspm, "PCIe ASPM: 0: disable, 1: enable, 2: dynamic");
|
||||
|
||||
/**
|
||||
* tune_pcie_caps() - Code to adjust PCIe capabilities.
|
||||
* @dd: Valid device data structure
|
||||
|
||||
Loading…
Reference in New Issue
Block a user