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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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drm/nouveau/kms/nv50-: convert wimm point() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
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2853ccf092
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@ -47,13 +47,15 @@ curs507a_update(struct nv50_wndw *wndw, u32 *interlock)
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nvif_wr32(&wndw->wimm.base.user, 0x0080, 0x00000000);
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}
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static void
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static int
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curs507a_point(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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if (curs507a_space(wndw)) {
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int ret = nvif_chan_wait(&wndw->wimm, 1);
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if (ret == 0) {
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nvif_wr32(&wndw->wimm.base.user, 0x0084, asyw->point.y << 16 |
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asyw->point.x);
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}
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return ret;
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}
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const struct nv50_wimm_func
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@ -29,13 +29,15 @@ cursc37a_update(struct nv50_wndw *wndw, u32 *interlock)
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nvif_wr32(&wndw->wimm.base.user, 0x0200, 0x00000001);
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}
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static void
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static int
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cursc37a_point(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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if (curs507a_space(wndw)) {
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int ret = nvif_chan_wait(&wndw->wimm, 1);
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if (ret == 0) {
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nvif_wr32(&wndw->wimm.base.user, 0x0208, asyw->point.y << 16 |
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asyw->point.x);
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}
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return ret;
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}
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static const struct nv50_wimm_func
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@ -24,6 +24,7 @@
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#include "wndw.h"
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#include <nvif/clc37b.h>
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#include <nvif/pushc37b.h>
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static void
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wimmc37b_update(struct nv50_wndw *wndw, u32 *interlock)
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@ -39,15 +40,17 @@ wimmc37b_update(struct nv50_wndw *wndw, u32 *interlock)
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}
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}
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static void
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static int
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wimmc37b_point(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
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{
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u32 *push;
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if ((push = evo_wait(&wndw->wimm, 2))) {
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evo_mthd(push, 0x0208, 1);
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evo_data(push, asyw->point.y << 16 | asyw->point.x);
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evo_kick(push, &wndw->wimm);
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}
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struct nvif_push *push = wndw->wimm.push;
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int ret;
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if ((ret = PUSH_WAIT(push, 2)))
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return ret;
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PUSH_NVSQ(push, NVC37B, 0x0208, asyw->point.y << 16 | asyw->point.x);
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return 0;
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}
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static const struct nv50_wimm_func
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@ -91,7 +91,7 @@ void base907c_csc(struct nv50_wndw *, struct nv50_wndw_atom *,
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const struct drm_color_ctm *);
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struct nv50_wimm_func {
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void (*point)(struct nv50_wndw *, struct nv50_wndw_atom *);
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int (*point)(struct nv50_wndw *, struct nv50_wndw_atom *);
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void (*update)(struct nv50_wndw *, u32 *interlock);
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};
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@ -99,6 +99,13 @@ struct nv50_wimm_func {
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extern const struct nv50_wimm_func curs507a;
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bool curs507a_space(struct nv50_wndw *);
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static inline __must_check int
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nvif_chan_wait(struct nv50_dmac *dmac, u32 size)
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{
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struct nv50_wndw *wndw = container_of(dmac, typeof(*wndw), wimm);
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return curs507a_space(wndw) ? 0 : -ETIMEDOUT;
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}
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int wndwc37e_new(struct nouveau_drm *, enum drm_plane_type, int, s32,
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struct nv50_wndw **);
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int wndwc37e_new_(const struct nv50_wndw_func *, struct nouveau_drm *,
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49
drivers/gpu/drm/nouveau/include/nvhw/class/clc37b.h
Normal file
49
drivers/gpu/drm/nouveau/include/nvhw/class/clc37b.h
Normal file
@ -0,0 +1,49 @@
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/*
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* Copyright (c) 1993-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _clC37b_h_
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#define _clC37b_h_
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// dma opcode instructions
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#define NVC37B_DMA
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#define NVC37B_DMA_OPCODE 31:29
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#define NVC37B_DMA_OPCODE_METHOD 0x00000000
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#define NVC37B_DMA_OPCODE_JUMP 0x00000001
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#define NVC37B_DMA_OPCODE_NONINC_METHOD 0x00000002
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#define NVC37B_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003
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#define NVC37B_DMA_METHOD_COUNT 27:18
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#define NVC37B_DMA_METHOD_OFFSET 13:2
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#define NVC37B_DMA_DATA 31:0
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#define NVC37B_DMA_DATA_NOP 0x00000000
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#define NVC37B_DMA_JUMP_OFFSET 11:2
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#define NVC37B_DMA_SET_SUBDEVICE_MASK_VALUE 11:0
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// class methods
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#define NVC37B_UPDATE (0x00000200)
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#define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW 1:1
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#define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW_DISABLE (0x00000000)
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#define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW_ENABLE (0x00000001)
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#define NVC37B_SET_POINT_OUT(b) (0x00000208 + (b)*0x00000004)
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#define NVC37B_SET_POINT_OUT_X 15:0
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#define NVC37B_SET_POINT_OUT_Y 31:16
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#endif // _clC37b_h
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18
drivers/gpu/drm/nouveau/include/nvif/pushc37b.h
Normal file
18
drivers/gpu/drm/nouveau/include/nvif/pushc37b.h
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@ -0,0 +1,18 @@
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#ifndef __NVIF_PUSHC37B_H__
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#define __NVIF_PUSHC37B_H__
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#include <nvif/push.h>
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#include <nvhw/class/clc37b.h>
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#define PUSH_HDR(p,m,c) do { \
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PUSH_ASSERT(!((m) & ~DRF_SMASK(NVC37B_DMA_METHOD_OFFSET)), "mthd"); \
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PUSH_ASSERT(!((c) & ~DRF_MASK(NVC37B_DMA_METHOD_COUNT)), "size"); \
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PUSH_DATA__((p), NVDEF(NVC37B, DMA, OPCODE, METHOD) | \
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NVVAL(NVC37B, DMA, METHOD_COUNT, (c)) | \
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NVVAL(NVC37B, DMA, METHOD_OFFSET, (m) >> 2), \
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" mthd 0x%04x size %d - %s", (u32)(m), (u32)(c), __func__); \
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} while(0)
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#define PUSH_MTHD_HDR(p,s,m,c) PUSH_HDR(p,m,c)
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#define PUSH_MTHD_INC 4:4
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#endif
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