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powerpc/PCI: register busn_res for root buses
Add the host bridge bus number aperture to the resource list. Like the MMIO and I/O port apertures, this is used when assigning resources to hot-added devices or in the case of conflicts. [bhelgaas: changelog] CC: Paul Mackerras <paulus@samba.org> CC: linuxppc-dev@lists.ozlabs.org CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -30,6 +30,7 @@ struct pci_controller {
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int first_busno;
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int last_busno;
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int self_busno;
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struct resource busn;
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void __iomem *io_base_virt;
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#ifdef CONFIG_PPC64
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@ -1637,6 +1637,11 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
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/* Wire up PHB bus resources */
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pcibios_setup_phb_resources(hose, &resources);
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hose->busn.start = hose->first_busno;
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hose->busn.end = hose->last_busno;
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hose->busn.flags = IORESOURCE_BUS;
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pci_add_resource(&resources, &hose->busn);
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/* Create an empty bus for the toplevel */
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bus = pci_create_root_bus(hose->parent, hose->first_busno,
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hose->ops, hose, &resources);
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@ -1646,7 +1651,6 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
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pci_free_resource_list(&resources);
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return;
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}
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bus->busn_res.start = hose->first_busno;
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hose->bus = bus;
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/* Get probe mode and perform scan */
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@ -1654,13 +1658,14 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
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if (node && ppc_md.pci_probe_mode)
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mode = ppc_md.pci_probe_mode(bus);
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pr_debug(" probe mode: %d\n", mode);
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if (mode == PCI_PROBE_DEVTREE) {
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bus->busn_res.end = hose->last_busno;
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if (mode == PCI_PROBE_DEVTREE)
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of_scan_bus(node, bus);
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}
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if (mode == PCI_PROBE_NORMAL)
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hose->last_busno = bus->busn_res.end = pci_scan_child_bus(bus);
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if (mode == PCI_PROBE_NORMAL) {
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pci_bus_update_busn_res_end(bus, 255);
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hose->last_busno = pci_scan_child_bus(bus);
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pci_bus_update_busn_res_end(bus, hose->last_busno);
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}
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/* Platform gets a chance to do some global fixups before
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* we proceed to resource allocation
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@ -240,7 +240,7 @@ void __devinit of_scan_pci_bridge(struct pci_dev *dev)
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}
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bus->primary = dev->bus->number;
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bus->busn_res.end = busrange[1];
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pci_bus_insert_busn_res(bus, busrange[0], busrange[1]);
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bus->bridge_ctl = 0;
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/* parse ranges property */
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