mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 19:26:51 +07:00
drm/nvd0/disp: init display sync channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs
parent
9285462273
commit
bdb8c212be
@ -35,12 +35,16 @@
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#include "nouveau_fb.h"
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#include "nv50_display.h"
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#define EVO_MASTER (0x00)
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#define EVO_SYNC(c) (0x01 + (c))
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#define EVO_CURS(c) (0x0d + (c))
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struct nvd0_display {
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struct nouveau_gpuobj *mem;
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struct {
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dma_addr_t handle;
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u32 *ptr;
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} evo[1];
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} evo[3];
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struct tasklet_struct tasklet;
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u32 modeset;
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@ -53,6 +57,15 @@ nvd0_display(struct drm_device *dev)
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return dev_priv->engine.display.priv;
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}
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static struct drm_crtc *
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nvd0_display_crtc_get(struct drm_encoder *encoder)
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{
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return nouveau_encoder(encoder)->crtc;
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}
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/******************************************************************************
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* EVO channel helpers
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*****************************************************************************/
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static inline int
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evo_icmd(struct drm_device *dev, int id, u32 mthd, u32 data)
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{
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@ -110,10 +123,72 @@ evo_kick(u32 *push, struct drm_device *dev, int id)
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#define evo_mthd(p,m,s) *((p)++) = (((s) << 18) | (m))
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#define evo_data(p,d) *((p)++) = (d)
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static struct drm_crtc *
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nvd0_display_crtc_get(struct drm_encoder *encoder)
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static int
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evo_init_dma(struct drm_device *dev, int ch)
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{
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return nouveau_encoder(encoder)->crtc;
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struct nvd0_display *disp = nvd0_display(dev);
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u32 flags;
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flags = 0x00000000;
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if (ch == EVO_MASTER)
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flags |= 0x01000000;
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nv_wr32(dev, 0x610494 + (ch * 0x0010), (disp->evo[ch].handle >> 8) | 3);
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nv_wr32(dev, 0x610498 + (ch * 0x0010), 0x00010000);
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nv_wr32(dev, 0x61049c + (ch * 0x0010), 0x00000001);
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nv_mask(dev, 0x610490 + (ch * 0x0010), 0x00000010, 0x00000010);
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nv_wr32(dev, 0x640000 + (ch * 0x1000), 0x00000000);
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nv_wr32(dev, 0x610490 + (ch * 0x0010), 0x00000013 | flags);
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if (!nv_wait(dev, 0x610490 + (ch * 0x0010), 0x80000000, 0x00000000)) {
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NV_ERROR(dev, "PDISP: ch%d 0x%08x\n", ch,
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nv_rd32(dev, 0x610490 + (ch * 0x0010)));
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return -EBUSY;
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}
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nv_mask(dev, 0x610090, (1 << ch), (1 << ch));
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nv_mask(dev, 0x6100a0, (1 << ch), (1 << ch));
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return 0;
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}
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static void
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evo_fini_dma(struct drm_device *dev, int ch)
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{
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if (!(nv_rd32(dev, 0x610490 + (ch * 0x0010)) & 0x00000010))
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return;
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nv_mask(dev, 0x610490 + (ch * 0x0010), 0x00000010, 0x00000000);
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nv_mask(dev, 0x610490 + (ch * 0x0010), 0x00000003, 0x00000000);
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nv_wait(dev, 0x610490 + (ch * 0x0010), 0x80000000, 0x00000000);
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nv_mask(dev, 0x610090, (1 << ch), 0x00000000);
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nv_mask(dev, 0x6100a0, (1 << ch), 0x00000000);
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}
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static int
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evo_init_pio(struct drm_device *dev, int ch)
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{
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nv_wr32(dev, 0x610490 + (ch * 0x0010), 0x00000001);
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if (!nv_wait(dev, 0x610490 + (ch * 0x0010), 0x00010000, 0x00010000)) {
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NV_ERROR(dev, "PDISP: ch%d 0x%08x\n", ch,
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nv_rd32(dev, 0x610490 + (ch * 0x0010)));
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return -EBUSY;
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}
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nv_mask(dev, 0x610090, (1 << ch), (1 << ch));
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nv_mask(dev, 0x6100a0, (1 << ch), (1 << ch));
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return 0;
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}
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static void
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evo_fini_pio(struct drm_device *dev, int ch)
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{
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if (!(nv_rd32(dev, 0x610490 + (ch * 0x0010)) & 0x00000001))
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return;
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nv_mask(dev, 0x610490 + (ch * 0x0010), 0x00000010, 0x00000010);
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nv_mask(dev, 0x610490 + (ch * 0x0010), 0x00000001, 0x00000000);
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nv_wait(dev, 0x610490 + (ch * 0x0010), 0x00010000, 0x00000000);
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nv_mask(dev, 0x610090, (1 << ch), 0x00000000);
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nv_mask(dev, 0x6100a0, (1 << ch), 0x00000000);
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}
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/******************************************************************************
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@ -1396,33 +1471,22 @@ nvd0_display_fini(struct drm_device *dev)
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{
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int i;
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/* fini cursors */
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for (i = 14; i >= 13; i--) {
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if (!(nv_rd32(dev, 0x610490 + (i * 0x10)) & 0x00000001))
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continue;
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nv_mask(dev, 0x610490 + (i * 0x10), 0x00000001, 0x00000000);
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nv_wait(dev, 0x610490 + (i * 0x10), 0x00010000, 0x00000000);
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nv_mask(dev, 0x610090, 1 << i, 0x00000000);
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nv_mask(dev, 0x6100a0, 1 << i, 0x00000000);
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/* fini cursors + syncs */
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for (i = 1; i >= 0; i--) {
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evo_fini_pio(dev, EVO_CURS(i));
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evo_fini_dma(dev, EVO_SYNC(i));
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}
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/* fini master */
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if (nv_rd32(dev, 0x610490) & 0x00000010) {
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nv_mask(dev, 0x610490, 0x00000010, 0x00000000);
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nv_mask(dev, 0x610490, 0x00000003, 0x00000000);
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nv_wait(dev, 0x610490, 0x80000000, 0x00000000);
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nv_mask(dev, 0x610090, 0x00000001, 0x00000000);
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nv_mask(dev, 0x6100a0, 0x00000001, 0x00000000);
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}
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evo_fini_dma(dev, EVO_MASTER);
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}
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int
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nvd0_display_init(struct drm_device *dev)
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{
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struct nvd0_display *disp = nvd0_display(dev);
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int ret, i;
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u32 *push;
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int i;
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if (nv_rd32(dev, 0x6100ac) & 0x00000100) {
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nv_wr32(dev, 0x6100ac, 0x00000100);
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@ -1447,7 +1511,7 @@ nvd0_display_init(struct drm_device *dev)
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nv_wr32(dev, 0x6301c4 + (i * 0x800), sor);
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}
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for (i = 0; i < 2; i++) {
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for (i = 0; i < dev->mode_config.num_crtc; i++) {
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u32 crtc0 = nv_rd32(dev, 0x616104 + (i * 0x800));
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u32 crtc1 = nv_rd32(dev, 0x616108 + (i * 0x800));
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u32 crtc2 = nv_rd32(dev, 0x61610c + (i * 0x800));
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@ -1461,36 +1525,22 @@ nvd0_display_init(struct drm_device *dev)
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nv_mask(dev, 0x6100b0, 0x00000307, 0x00000307);
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/* init master */
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nv_wr32(dev, 0x610494, (disp->evo[0].handle >> 8) | 3);
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nv_wr32(dev, 0x610498, 0x00010000);
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nv_wr32(dev, 0x61049c, 0x00000001);
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nv_mask(dev, 0x610490, 0x00000010, 0x00000010);
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nv_wr32(dev, 0x640000, 0x00000000);
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nv_wr32(dev, 0x610490, 0x01000013);
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if (!nv_wait(dev, 0x610490, 0x80000000, 0x00000000)) {
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NV_ERROR(dev, "PDISP: master 0x%08x\n",
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nv_rd32(dev, 0x610490));
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return -EBUSY;
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}
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nv_mask(dev, 0x610090, 0x00000001, 0x00000001);
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nv_mask(dev, 0x6100a0, 0x00000001, 0x00000001);
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ret = evo_init_dma(dev, EVO_MASTER);
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if (ret)
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goto error;
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/* init cursors */
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for (i = 13; i <= 14; i++) {
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nv_wr32(dev, 0x610490 + (i * 0x10), 0x00000001);
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if (!nv_wait(dev, 0x610490 + (i * 0x10), 0x00010000, 0x00010000)) {
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NV_ERROR(dev, "PDISP: curs%d 0x%08x\n", i,
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nv_rd32(dev, 0x610490 + (i * 0x10)));
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return -EBUSY;
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}
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nv_mask(dev, 0x610090, 1 << i, 1 << i);
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nv_mask(dev, 0x6100a0, 1 << i, 1 << i);
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/* init syncs + cursors */
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for (i = 0; i < dev->mode_config.num_crtc; i++) {
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if ((ret = evo_init_dma(dev, EVO_SYNC(i))) ||
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(ret = evo_init_pio(dev, EVO_CURS(i))))
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goto error;
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}
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push = evo_wait(dev, 0, 32);
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if (!push)
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return -EBUSY;
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if (!push) {
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ret = -EBUSY;
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goto error;
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}
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evo_mthd(push, 0x0088, 1);
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evo_data(push, NvEvoSync);
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evo_mthd(push, 0x0084, 1);
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@ -1501,7 +1551,10 @@ nvd0_display_init(struct drm_device *dev)
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evo_data(push, 0x00000000);
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evo_kick(push, dev, 0);
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return 0;
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error:
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if (ret)
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nvd0_display_fini(dev);
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return ret;
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}
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void
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@ -1510,8 +1563,13 @@ nvd0_display_destroy(struct drm_device *dev)
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nvd0_display *disp = nvd0_display(dev);
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struct pci_dev *pdev = dev->pdev;
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int i;
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for (i = 0; i < 3; i++) {
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pci_free_consistent(pdev, PAGE_SIZE, disp->evo[i].ptr,
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disp->evo[i].handle);
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}
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pci_free_consistent(pdev, PAGE_SIZE, disp->evo[0].ptr, disp->evo[0].handle);
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nouveau_gpuobj_ref(NULL, &disp->mem);
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nouveau_irq_unregister(dev, 26);
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@ -1629,11 +1687,13 @@ nvd0_display_create(struct drm_device *dev)
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pinstmem->flush(dev);
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/* push buffers for evo channels */
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disp->evo[0].ptr =
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pci_alloc_consistent(pdev, PAGE_SIZE, &disp->evo[0].handle);
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if (!disp->evo[0].ptr) {
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ret = -ENOMEM;
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goto out;
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for (i = 0; i < 3; i++) {
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disp->evo[i].ptr = pci_alloc_consistent(pdev, PAGE_SIZE,
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&disp->evo[i].handle);
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if (!disp->evo[i].ptr) {
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ret = -ENOMEM;
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goto out;
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}
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}
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out:
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