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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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powerpc: Hook in new transactional memory code
This hooks the new transactional memory code into context switching, FP/VMX/VMX unavailable and exception return. Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Michael Neuling
Benjamin Herrenschmidt
parent
f54db641b9
commit
bc2a9408fa
@ -1176,9 +1176,26 @@ fp_unavailable_common:
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl .kernel_fp_unavailable_exception
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BUG_OPCODE
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1: bl .load_up_fpu
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1:
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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BEGIN_FTR_SECTION
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/* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
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* transaction), go do TM stuff
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*/
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rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
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bne- 2f
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END_FTR_SECTION_IFSET(CPU_FTR_TM)
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#endif
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bl .load_up_fpu
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b fast_exception_return
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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2: /* User process was in a transaction */
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bl .save_nvgprs
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DISABLE_INTS
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl .fp_unavailable_tm
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b .ret_from_except
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#endif
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.align 7
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.globl altivec_unavailable_common
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altivec_unavailable_common:
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@ -1186,8 +1203,25 @@ altivec_unavailable_common:
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#ifdef CONFIG_ALTIVEC
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BEGIN_FTR_SECTION
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beq 1f
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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BEGIN_FTR_SECTION_NESTED(69)
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/* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
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* transaction), go do TM stuff
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*/
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rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
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bne- 2f
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END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
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#endif
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bl .load_up_altivec
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b fast_exception_return
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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2: /* User process was in a transaction */
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bl .save_nvgprs
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DISABLE_INTS
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl .altivec_unavailable_tm
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b .ret_from_except
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#endif
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1:
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END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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#endif
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@ -1204,7 +1238,24 @@ vsx_unavailable_common:
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#ifdef CONFIG_VSX
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BEGIN_FTR_SECTION
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beq 1f
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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BEGIN_FTR_SECTION_NESTED(69)
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/* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
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* transaction), go do TM stuff
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*/
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rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
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bne- 2f
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END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
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#endif
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b .load_up_vsx
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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2: /* User process was in a transaction */
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bl .save_nvgprs
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DISABLE_INTS
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl .vsx_unavailable_tm
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b .ret_from_except
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#endif
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1:
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END_FTR_SECTION_IFSET(CPU_FTR_VSX)
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#endif
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@ -1219,6 +1270,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
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tm_unavailable_common:
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EXCEPTION_PROLOG_COMMON(0xf60, PACA_EXGEN)
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bl .save_nvgprs
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DISABLE_INTS
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addi r3,r1,STACK_FRAME_OVERHEAD
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bl .tm_unavailable_exception
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b .ret_from_except
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@ -515,7 +515,7 @@ static inline void tm_reclaim_task(struct task_struct *tsk)
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tm_save_sprs(thr);
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}
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static inline void __maybe_unused tm_recheckpoint_new_task(struct task_struct *new)
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static inline void tm_recheckpoint_new_task(struct task_struct *new)
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{
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unsigned long msr;
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@ -590,6 +590,8 @@ struct task_struct *__switch_to(struct task_struct *prev,
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struct ppc64_tlb_batch *batch;
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#endif
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__switch_to_tm(prev);
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#ifdef CONFIG_SMP
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/* avoid complexity of lazy save/restore of fpu
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* by just saving it every time we switch out if
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@ -705,6 +707,9 @@ struct task_struct *__switch_to(struct task_struct *prev,
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* of sync. Hard disable here.
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*/
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hard_irq_disable();
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tm_recheckpoint_new_task(new);
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last = _switch(old_thread, new_thread);
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#ifdef CONFIG_PPC_BOOK3S_64
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@ -1080,7 +1085,6 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
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regs->msr = MSR_USER32;
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}
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#endif
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discard_lazy_cpu_state();
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#ifdef CONFIG_VSX
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current->thread.used_vsr = 0;
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@ -1100,6 +1104,13 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
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current->thread.spefscr = 0;
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current->thread.used_spe = 0;
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#endif /* CONFIG_SPE */
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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if (cpu_has_feature(CPU_FTR_TM))
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regs->msr |= MSR_TM;
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current->thread.tm_tfhar = 0;
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current->thread.tm_texasr = 0;
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current->thread.tm_tfiar = 0;
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#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
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}
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#define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
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@ -1029,6 +1029,38 @@ void __kprobes program_check_exception(struct pt_regs *regs)
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_exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
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return;
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}
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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if (reason & REASON_TM) {
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/* This is a TM "Bad Thing Exception" program check.
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* This occurs when:
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* - An rfid/hrfid/mtmsrd attempts to cause an illegal
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* transition in TM states.
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* - A trechkpt is attempted when transactional.
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* - A treclaim is attempted when non transactional.
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* - A tend is illegally attempted.
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* - writing a TM SPR when transactional.
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*/
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if (!user_mode(regs) &&
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report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) {
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regs->nip += 4;
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return;
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}
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/* If usermode caused this, it's done something illegal and
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* gets a SIGILL slap on the wrist. We call it an illegal
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* operand to distinguish from the instruction just being bad
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* (e.g. executing a 'tend' on a CPU without TM!); it's an
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* illegal /placement/ of a valid instruction.
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*/
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if (user_mode(regs)) {
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_exception(SIGILL, regs, ILL_ILLOPN, regs->nip);
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return;
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} else {
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printk(KERN_EMERG "Unexpected TM Bad Thing exception "
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"at %lx (msr 0x%x)\n", regs->nip, reason);
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die("Unrecoverable exception", regs, SIGABRT);
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}
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}
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#endif
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/* We restore the interrupt state now */
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if (!arch_irq_disabled_regs(regs))
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@ -55,6 +55,7 @@
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#include <asm/code-patching.h>
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#include <asm/fadump.h>
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#include <asm/firmware.h>
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#include <asm/tm.h>
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#ifdef DEBUG
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#define DBG(fmt...) udbg_printf(fmt)
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@ -1171,6 +1172,21 @@ void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize, int ssize,
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DBG_LOW(" sub %ld: hash=%lx, hidx=%lx\n", index, slot, hidx);
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ppc_md.hpte_invalidate(slot, vpn, psize, ssize, local);
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} pte_iterate_hashed_end();
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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/* Transactions are not aborted by tlbiel, only tlbie.
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* Without, syncing a page back to a block device w/ PIO could pick up
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* transactional data (bad!) so we force an abort here. Before the
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* sync the page will be made read-only, which will flush_hash_page.
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* BIG ISSUE here: if the kernel uses a page from userspace without
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* unmapping it first, it may see the speculated version.
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*/
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if (local && cpu_has_feature(CPU_FTR_TM) &&
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MSR_TM_ACTIVE(current->thread.regs->msr)) {
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tm_enable();
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tm_abort(TM_CAUSE_TLBI);
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}
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#endif
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}
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void flush_hash_range(unsigned long number, int local)
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