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drm/amdgpu: limit the GTT manager address space
We should only cover the GART size with the GTT manager. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -42,6 +42,7 @@ struct amdgpu_gtt_mgr {
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static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man,
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unsigned long p_size)
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{
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struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
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struct amdgpu_gtt_mgr *mgr;
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uint64_t start, size;
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@ -50,7 +51,7 @@ static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man,
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return -ENOMEM;
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start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
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size = p_size - start;
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size = (adev->mc.gart_size >> PAGE_SHIFT) - start;
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drm_mm_init(&mgr->mm, start, size);
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spin_lock_init(&mgr->lock);
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mgr->available = p_size;
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@ -112,6 +113,7 @@ int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
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const struct ttm_place *place,
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struct ttm_mem_reg *mem)
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{
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struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
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struct amdgpu_gtt_mgr *mgr = man->priv;
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struct drm_mm_node *node = mem->mm_node;
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enum drm_mm_insert_mode mode;
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@ -129,7 +131,7 @@ int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
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if (place && place->lpfn)
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lpfn = place->lpfn;
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else
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lpfn = man->size;
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lpfn = adev->gart.num_cpu_pages;
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mode = DRM_MM_INSERT_BEST;
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if (place && place->flags & TTM_PL_FLAG_TOPDOWN)
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