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ARM: dts: sun7i: Split the RTS and CTS pins out of the UART nodes

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Some UART nodes on the A20 DTSI do not share the same pattern that we use
everywhere else, with the RTS and CTS pins split away from the TX and RX
pins. Make those pin groups consistent with the rest of our DT.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Maxime Ripard 2018-11-22 11:18:09 +01:00
parent 85a8c520ca
commit bb4d3ec9a7
No known key found for this signature in database
GPG Key ID: E3EF0D6F671851C5
3 changed files with 15 additions and 5 deletions
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4
arch/arm/boot/dts/sun7i-a20-hummingbird.dts
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@ -215,13 +215,13 @@ &uart0 {
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pi_pins>;
pinctrl-0 = <&uart2_pi_pins>, <&uart2_cts_rts_pi_pins>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pg_pins>;
pinctrl-0 = <&uart3_pg_pins>, <&uart3_cts_rts_pg_pins>;
status = "okay";
};

2
arch/arm/boot/dts/sun7i-a20-mk808c.dts
View File

@ -173,7 +173,7 @@ &uart0 {
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pi_pins>;
pinctrl-0 = <&uart2_pi_pins>, <&uart2_cts_rts_pi_pins>;
status = "okay";
};

14
arch/arm/boot/dts/sun7i-a20.dtsi
View File

@ -935,12 +935,22 @@ uart0_pb_pins: uart0-pb-pins {
};
uart2_pi_pins: uart2-pi-pins {
pins = "PI16", "PI17", "PI18", "PI19";
pins = "PI18", "PI19";
function = "uart2";
};
uart2_cts_rts_pi_pins: uart2-cts-rts-pi-pins {
pins = "PI16", "PI17";
function = "uart2";
};
uart3_pg_pins: uart3-pg-pins {
pins = "PG6", "PG7", "PG8", "PG9";
pins = "PG6", "PG7";
function = "uart3";
};
uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins {
pins = "PG8", "PG9";
function = "uart3";
};