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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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x86/apic: Remove unused callbacks
Now that the old allocator is gone, these apic functions are unused. Remove them. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Juergen Gross <jgross@suse.com> Tested-by: Yu Chen <yu.c.chen@intel.com> Acked-by: Juergen Gross <jgross@suse.com> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Alok Kataria <akataria@vmware.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Christoph Hellwig <hch@lst.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Rui Zhang <rui.zhang@intel.com> Cc: "K. Y. Srinivasan" <kys@microsoft.com> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Len Brown <lenb@kernel.org> Link: https://lkml.kernel.org/r/20170913213155.524662349@linutronix.de
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@ -11,64 +11,16 @@ u32 apic_default_calc_apicid(unsigned int cpu)
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return per_cpu(x86_cpu_to_apicid, cpu);
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return per_cpu(x86_cpu_to_apicid, cpu);
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}
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}
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int default_cpu_mask_to_apicid(const struct cpumask *msk, struct irq_data *irqd,
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unsigned int *apicid)
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{
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unsigned int cpu = cpumask_first(msk);
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if (cpu >= nr_cpu_ids)
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return -EINVAL;
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*apicid = per_cpu(x86_cpu_to_apicid, cpu);
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irq_data_update_effective_affinity(irqd, cpumask_of(cpu));
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return 0;
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}
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u32 apic_flat_calc_apicid(unsigned int cpu)
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u32 apic_flat_calc_apicid(unsigned int cpu)
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{
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{
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return 1U << cpu;
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return 1U << cpu;
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}
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}
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int flat_cpu_mask_to_apicid(const struct cpumask *mask, struct irq_data *irqd,
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unsigned int *apicid)
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{
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struct cpumask *effmsk = irq_data_get_effective_affinity_mask(irqd);
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unsigned long cpu_mask = cpumask_bits(mask)[0] & APIC_ALL_CPUS;
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if (!cpu_mask)
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return -EINVAL;
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*apicid = (unsigned int)cpu_mask;
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cpumask_bits(effmsk)[0] = cpu_mask;
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return 0;
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}
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bool default_check_apicid_used(physid_mask_t *map, int apicid)
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bool default_check_apicid_used(physid_mask_t *map, int apicid)
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{
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{
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return physid_isset(apicid, *map);
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return physid_isset(apicid, *map);
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}
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}
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void flat_vector_allocation_domain(int cpu, struct cpumask *retmask,
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const struct cpumask *mask)
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{
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/*
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* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* priority interrupt delivery mode.
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*
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* In particular there was a hyperthreading cpu observed to
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* deliver interrupts to the wrong hyperthread when only one
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* hyperthread was specified in the interrupt desitination.
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*/
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cpumask_clear(retmask);
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cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
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}
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void default_vector_allocation_domain(int cpu, struct cpumask *retmask,
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const struct cpumask *mask)
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{
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cpumask_copy(retmask, cpumask_of(cpu));
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}
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void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap)
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void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap)
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{
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{
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*retmap = *phys_map;
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*retmap = *phys_map;
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@ -158,7 +158,6 @@ static struct apic apic_flat __ro_after_init = {
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.dest_logical = APIC_DEST_LOGICAL,
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.dest_logical = APIC_DEST_LOGICAL,
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.check_apicid_used = NULL,
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.check_apicid_used = NULL,
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.vector_allocation_domain = flat_vector_allocation_domain,
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.init_apic_ldr = flat_init_apic_ldr,
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.init_apic_ldr = flat_init_apic_ldr,
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.ioapic_phys_id_map = NULL,
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.ioapic_phys_id_map = NULL,
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@ -171,7 +170,6 @@ static struct apic apic_flat __ro_after_init = {
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.get_apic_id = flat_get_apic_id,
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.get_apic_id = flat_get_apic_id,
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.set_apic_id = set_apic_id,
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.set_apic_id = set_apic_id,
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.cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
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.calc_dest_apicid = apic_flat_calc_apicid,
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.calc_dest_apicid = apic_flat_calc_apicid,
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.send_IPI = default_send_IPI_single,
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.send_IPI = default_send_IPI_single,
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@ -253,7 +251,6 @@ static struct apic apic_physflat __ro_after_init = {
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.dest_logical = 0,
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.dest_logical = 0,
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.check_apicid_used = NULL,
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.check_apicid_used = NULL,
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.vector_allocation_domain = default_vector_allocation_domain,
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/* not needed, but shouldn't hurt: */
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/* not needed, but shouldn't hurt: */
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.init_apic_ldr = flat_init_apic_ldr,
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.init_apic_ldr = flat_init_apic_ldr,
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@ -267,7 +264,6 @@ static struct apic apic_physflat __ro_after_init = {
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.get_apic_id = flat_get_apic_id,
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.get_apic_id = flat_get_apic_id,
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.set_apic_id = set_apic_id,
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.set_apic_id = set_apic_id,
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.cpu_mask_to_apicid = default_cpu_mask_to_apicid,
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.calc_dest_apicid = apic_default_calc_apicid,
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.calc_dest_apicid = apic_default_calc_apicid,
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.send_IPI = default_send_IPI_single_phys,
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.send_IPI = default_send_IPI_single_phys,
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@ -83,14 +83,6 @@ static int noop_apic_id_registered(void)
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return physid_isset(0, phys_cpu_present_map);
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return physid_isset(0, phys_cpu_present_map);
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}
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}
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static void noop_vector_allocation_domain(int cpu, struct cpumask *retmask,
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const struct cpumask *mask)
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{
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if (cpu != 0)
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pr_warning("APIC: Vector allocated for non-BSP cpu\n");
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cpumask_copy(retmask, cpumask_of(cpu));
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}
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static u32 noop_apic_read(u32 reg)
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static u32 noop_apic_read(u32 reg)
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{
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{
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WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !disable_apic);
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WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_APIC) && !disable_apic);
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@ -125,7 +117,6 @@ struct apic apic_noop __ro_after_init = {
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.dest_logical = APIC_DEST_LOGICAL,
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.dest_logical = APIC_DEST_LOGICAL,
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.check_apicid_used = default_check_apicid_used,
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.check_apicid_used = default_check_apicid_used,
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.vector_allocation_domain = noop_vector_allocation_domain,
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.init_apic_ldr = noop_init_apic_ldr,
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.init_apic_ldr = noop_init_apic_ldr,
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.ioapic_phys_id_map = default_ioapic_phys_id_map,
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.ioapic_phys_id_map = default_ioapic_phys_id_map,
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@ -141,7 +132,6 @@ struct apic apic_noop __ro_after_init = {
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.get_apic_id = noop_get_apic_id,
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.get_apic_id = noop_get_apic_id,
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.set_apic_id = NULL,
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.set_apic_id = NULL,
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.cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
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.calc_dest_apicid = apic_flat_calc_apicid,
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.calc_dest_apicid = apic_flat_calc_apicid,
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.send_IPI = noop_send_IPI,
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.send_IPI = noop_send_IPI,
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@ -253,7 +253,6 @@ static const struct apic apic_numachip1 __refconst = {
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.dest_logical = 0,
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.dest_logical = 0,
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.check_apicid_used = NULL,
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.check_apicid_used = NULL,
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.vector_allocation_domain = default_vector_allocation_domain,
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.init_apic_ldr = flat_init_apic_ldr,
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.init_apic_ldr = flat_init_apic_ldr,
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.ioapic_phys_id_map = NULL,
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.ioapic_phys_id_map = NULL,
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@ -266,7 +265,6 @@ static const struct apic apic_numachip1 __refconst = {
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.get_apic_id = numachip1_get_apic_id,
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.get_apic_id = numachip1_get_apic_id,
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.set_apic_id = numachip1_set_apic_id,
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.set_apic_id = numachip1_set_apic_id,
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.cpu_mask_to_apicid = default_cpu_mask_to_apicid,
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.calc_dest_apicid = apic_default_calc_apicid,
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.calc_dest_apicid = apic_default_calc_apicid,
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.send_IPI = numachip_send_IPI_one,
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.send_IPI = numachip_send_IPI_one,
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@ -304,7 +302,6 @@ static const struct apic apic_numachip2 __refconst = {
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.dest_logical = 0,
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.dest_logical = 0,
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.check_apicid_used = NULL,
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.check_apicid_used = NULL,
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.vector_allocation_domain = default_vector_allocation_domain,
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.init_apic_ldr = flat_init_apic_ldr,
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.init_apic_ldr = flat_init_apic_ldr,
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.ioapic_phys_id_map = NULL,
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.ioapic_phys_id_map = NULL,
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@ -317,7 +314,6 @@ static const struct apic apic_numachip2 __refconst = {
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.get_apic_id = numachip2_get_apic_id,
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.get_apic_id = numachip2_get_apic_id,
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.set_apic_id = numachip2_set_apic_id,
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.set_apic_id = numachip2_set_apic_id,
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.cpu_mask_to_apicid = default_cpu_mask_to_apicid,
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.calc_dest_apicid = apic_default_calc_apicid,
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.calc_dest_apicid = apic_default_calc_apicid,
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.send_IPI = numachip_send_IPI_one,
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.send_IPI = numachip_send_IPI_one,
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@ -158,7 +158,6 @@ static struct apic apic_bigsmp __ro_after_init = {
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.dest_logical = 0,
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.dest_logical = 0,
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.check_apicid_used = bigsmp_check_apicid_used,
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.check_apicid_used = bigsmp_check_apicid_used,
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.vector_allocation_domain = default_vector_allocation_domain,
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.init_apic_ldr = bigsmp_init_apic_ldr,
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.init_apic_ldr = bigsmp_init_apic_ldr,
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.ioapic_phys_id_map = bigsmp_ioapic_phys_id_map,
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.ioapic_phys_id_map = bigsmp_ioapic_phys_id_map,
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@ -171,7 +170,6 @@ static struct apic apic_bigsmp __ro_after_init = {
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.get_apic_id = bigsmp_get_apic_id,
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.get_apic_id = bigsmp_get_apic_id,
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.set_apic_id = NULL,
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.set_apic_id = NULL,
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.cpu_mask_to_apicid = default_cpu_mask_to_apicid,
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.calc_dest_apicid = apic_default_calc_apicid,
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.calc_dest_apicid = apic_default_calc_apicid,
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.send_IPI = default_send_IPI_single_phys,
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.send_IPI = default_send_IPI_single_phys,
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@ -113,7 +113,6 @@ static struct apic apic_default __ro_after_init = {
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.dest_logical = APIC_DEST_LOGICAL,
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.dest_logical = APIC_DEST_LOGICAL,
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.check_apicid_used = default_check_apicid_used,
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.check_apicid_used = default_check_apicid_used,
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.vector_allocation_domain = flat_vector_allocation_domain,
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.init_apic_ldr = default_init_apic_ldr,
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.init_apic_ldr = default_init_apic_ldr,
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.ioapic_phys_id_map = default_ioapic_phys_id_map,
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.ioapic_phys_id_map = default_ioapic_phys_id_map,
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@ -126,7 +125,6 @@ static struct apic apic_default __ro_after_init = {
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.get_apic_id = default_get_apic_id,
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.get_apic_id = default_get_apic_id,
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.set_apic_id = NULL,
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.set_apic_id = NULL,
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.cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
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.calc_dest_apicid = apic_flat_calc_apicid,
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.calc_dest_apicid = apic_flat_calc_apicid,
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.send_IPI = default_send_IPI_single,
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.send_IPI = default_send_IPI_single,
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@ -91,29 +91,6 @@ static void x2apic_send_IPI_all(int vector)
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__x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
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__x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
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}
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}
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static int
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x2apic_cpu_mask_to_apicid(const struct cpumask *mask, struct irq_data *irqdata,
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unsigned int *apicid)
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{
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struct cpumask *effmsk = irq_data_get_effective_affinity_mask(irqdata);
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struct cluster_mask *cmsk;
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unsigned int cpu;
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u32 dest = 0;
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cpu = cpumask_first(mask);
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if (cpu >= nr_cpu_ids)
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return -EINVAL;
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cmsk = per_cpu(cluster_masks, cpu);
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cpumask_clear(effmsk);
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for_each_cpu_and(cpu, &cmsk->mask, mask) {
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dest |= per_cpu(x86_cpu_to_logical_apicid, cpu);
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cpumask_set_cpu(cpu, effmsk);
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}
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*apicid = dest;
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return 0;
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}
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static u32 x2apic_calc_apicid(unsigned int cpu)
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static u32 x2apic_calc_apicid(unsigned int cpu)
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{
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{
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return per_cpu(x86_cpu_to_logical_apicid, cpu);
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return per_cpu(x86_cpu_to_logical_apicid, cpu);
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@ -198,29 +175,6 @@ static int x2apic_cluster_probe(void)
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return 1;
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return 1;
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}
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}
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/*
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* Each x2apic cluster is an allocation domain.
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*/
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static void cluster_vector_allocation_domain(int cpu, struct cpumask *retmask,
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const struct cpumask *mask)
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{
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struct cluster_mask *cmsk = per_cpu(cluster_masks, cpu);
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/*
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* To minimize vector pressure, default case of boot, device bringup
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* etc will use a single cpu for the interrupt destination.
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*
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* On explicit migration requests coming from irqbalance etc,
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* interrupts will be routed to the x2apic cluster (cluster-id
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* derived from the first cpu in the mask) members specified
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* in the mask.
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*/
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if (cpumask_equal(mask, cpu_online_mask))
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cpumask_copy(retmask, cpumask_of(cpu));
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else
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cpumask_and(retmask, mask, &cmsk->mask);
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}
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static struct apic apic_x2apic_cluster __ro_after_init = {
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static struct apic apic_x2apic_cluster __ro_after_init = {
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.name = "cluster x2apic",
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.name = "cluster x2apic",
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@ -236,7 +190,6 @@ static struct apic apic_x2apic_cluster __ro_after_init = {
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.dest_logical = APIC_DEST_LOGICAL,
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.dest_logical = APIC_DEST_LOGICAL,
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.check_apicid_used = NULL,
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.check_apicid_used = NULL,
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.vector_allocation_domain = cluster_vector_allocation_domain,
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.init_apic_ldr = init_x2apic_ldr,
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.init_apic_ldr = init_x2apic_ldr,
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.ioapic_phys_id_map = NULL,
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.ioapic_phys_id_map = NULL,
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@ -249,7 +202,6 @@ static struct apic apic_x2apic_cluster __ro_after_init = {
|
|||||||
.get_apic_id = x2apic_get_apic_id,
|
.get_apic_id = x2apic_get_apic_id,
|
||||||
.set_apic_id = x2apic_set_apic_id,
|
.set_apic_id = x2apic_set_apic_id,
|
||||||
|
|
||||||
.cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
|
|
||||||
.calc_dest_apicid = x2apic_calc_apicid,
|
.calc_dest_apicid = x2apic_calc_apicid,
|
||||||
|
|
||||||
.send_IPI = x2apic_send_IPI,
|
.send_IPI = x2apic_send_IPI,
|
||||||
|
@ -151,7 +151,6 @@ static struct apic apic_x2apic_phys __ro_after_init = {
|
|||||||
.dest_logical = 0,
|
.dest_logical = 0,
|
||||||
.check_apicid_used = NULL,
|
.check_apicid_used = NULL,
|
||||||
|
|
||||||
.vector_allocation_domain = default_vector_allocation_domain,
|
|
||||||
.init_apic_ldr = init_x2apic_ldr,
|
.init_apic_ldr = init_x2apic_ldr,
|
||||||
|
|
||||||
.ioapic_phys_id_map = NULL,
|
.ioapic_phys_id_map = NULL,
|
||||||
@ -164,7 +163,6 @@ static struct apic apic_x2apic_phys __ro_after_init = {
|
|||||||
.get_apic_id = x2apic_get_apic_id,
|
.get_apic_id = x2apic_get_apic_id,
|
||||||
.set_apic_id = x2apic_set_apic_id,
|
.set_apic_id = x2apic_set_apic_id,
|
||||||
|
|
||||||
.cpu_mask_to_apicid = default_cpu_mask_to_apicid,
|
|
||||||
.calc_dest_apicid = apic_default_calc_apicid,
|
.calc_dest_apicid = apic_default_calc_apicid,
|
||||||
|
|
||||||
.send_IPI = x2apic_send_IPI,
|
.send_IPI = x2apic_send_IPI,
|
||||||
|
@ -525,18 +525,6 @@ static void uv_init_apic_ldr(void)
|
|||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
|
||||||
uv_cpu_mask_to_apicid(const struct cpumask *mask, struct irq_data *irqdata,
|
|
||||||
unsigned int *apicid)
|
|
||||||
{
|
|
||||||
int ret = default_cpu_mask_to_apicid(mask, irqdata, apicid);
|
|
||||||
|
|
||||||
if (!ret)
|
|
||||||
*apicid |= uv_apicid_hibits;
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
static u32 apic_uv_calc_apicid(unsigned int cpu)
|
static u32 apic_uv_calc_apicid(unsigned int cpu)
|
||||||
{
|
{
|
||||||
return apic_default_calc_apicid(cpu) | uv_apicid_hibits;
|
return apic_default_calc_apicid(cpu) | uv_apicid_hibits;
|
||||||
@ -593,7 +581,6 @@ static struct apic apic_x2apic_uv_x __ro_after_init = {
|
|||||||
.dest_logical = APIC_DEST_LOGICAL,
|
.dest_logical = APIC_DEST_LOGICAL,
|
||||||
.check_apicid_used = NULL,
|
.check_apicid_used = NULL,
|
||||||
|
|
||||||
.vector_allocation_domain = default_vector_allocation_domain,
|
|
||||||
.init_apic_ldr = uv_init_apic_ldr,
|
.init_apic_ldr = uv_init_apic_ldr,
|
||||||
|
|
||||||
.ioapic_phys_id_map = NULL,
|
.ioapic_phys_id_map = NULL,
|
||||||
@ -606,7 +593,6 @@ static struct apic apic_x2apic_uv_x __ro_after_init = {
|
|||||||
.get_apic_id = x2apic_get_apic_id,
|
.get_apic_id = x2apic_get_apic_id,
|
||||||
.set_apic_id = set_apic_id,
|
.set_apic_id = set_apic_id,
|
||||||
|
|
||||||
.cpu_mask_to_apicid = uv_cpu_mask_to_apicid,
|
|
||||||
.calc_dest_apicid = apic_uv_calc_apicid,
|
.calc_dest_apicid = apic_uv_calc_apicid,
|
||||||
|
|
||||||
.send_IPI = uv_send_IPI_one,
|
.send_IPI = uv_send_IPI_one,
|
||||||
|
@ -26,9 +26,6 @@
|
|||||||
|
|
||||||
#define TOPOLOGY_REGISTER_OFFSET 0x10
|
#define TOPOLOGY_REGISTER_OFFSET 0x10
|
||||||
|
|
||||||
/* Flag below is initialized once during vSMP PCI initialization. */
|
|
||||||
static int irq_routing_comply = 1;
|
|
||||||
|
|
||||||
#if defined CONFIG_PCI && defined CONFIG_PARAVIRT
|
#if defined CONFIG_PCI && defined CONFIG_PARAVIRT
|
||||||
/*
|
/*
|
||||||
* Interrupt control on vSMPowered systems:
|
* Interrupt control on vSMPowered systems:
|
||||||
@ -105,9 +102,6 @@ static void __init set_vsmp_pv_ops(void)
|
|||||||
if (cap & ctl & BIT(8)) {
|
if (cap & ctl & BIT(8)) {
|
||||||
ctl &= ~BIT(8);
|
ctl &= ~BIT(8);
|
||||||
|
|
||||||
/* Interrupt routing set to ignore */
|
|
||||||
irq_routing_comply = 0;
|
|
||||||
|
|
||||||
#ifdef CONFIG_PROC_FS
|
#ifdef CONFIG_PROC_FS
|
||||||
/* Don't let users change irq affinity via procfs */
|
/* Don't let users change irq affinity via procfs */
|
||||||
no_irq_affinity = 1;
|
no_irq_affinity = 1;
|
||||||
@ -211,23 +205,10 @@ static int apicid_phys_pkg_id(int initial_apic_id, int index_msb)
|
|||||||
return hard_smp_processor_id() >> index_msb;
|
return hard_smp_processor_id() >> index_msb;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
* In vSMP, all cpus should be capable of handling interrupts, regardless of
|
|
||||||
* the APIC used.
|
|
||||||
*/
|
|
||||||
static void fill_vector_allocation_domain(int cpu, struct cpumask *retmask,
|
|
||||||
const struct cpumask *mask)
|
|
||||||
{
|
|
||||||
cpumask_setall(retmask);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void vsmp_apic_post_init(void)
|
static void vsmp_apic_post_init(void)
|
||||||
{
|
{
|
||||||
/* need to update phys_pkg_id */
|
/* need to update phys_pkg_id */
|
||||||
apic->phys_pkg_id = apicid_phys_pkg_id;
|
apic->phys_pkg_id = apicid_phys_pkg_id;
|
||||||
|
|
||||||
if (!irq_routing_comply)
|
|
||||||
apic->vector_allocation_domain = fill_vector_allocation_domain;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init vsmp_init(void)
|
void __init vsmp_init(void)
|
||||||
|
@ -164,7 +164,6 @@ static struct apic xen_pv_apic = {
|
|||||||
/* .dest_logical - default_send_IPI_ use it but we use our own. */
|
/* .dest_logical - default_send_IPI_ use it but we use our own. */
|
||||||
.check_apicid_used = default_check_apicid_used, /* Used on 32-bit */
|
.check_apicid_used = default_check_apicid_used, /* Used on 32-bit */
|
||||||
|
|
||||||
.vector_allocation_domain = flat_vector_allocation_domain,
|
|
||||||
.init_apic_ldr = xen_noop, /* setup_local_APIC calls it */
|
.init_apic_ldr = xen_noop, /* setup_local_APIC calls it */
|
||||||
|
|
||||||
.ioapic_phys_id_map = default_ioapic_phys_id_map, /* Used on 32-bit */
|
.ioapic_phys_id_map = default_ioapic_phys_id_map, /* Used on 32-bit */
|
||||||
@ -177,7 +176,6 @@ static struct apic xen_pv_apic = {
|
|||||||
.get_apic_id = xen_get_apic_id,
|
.get_apic_id = xen_get_apic_id,
|
||||||
.set_apic_id = xen_set_apic_id, /* Can be NULL on 32-bit. */
|
.set_apic_id = xen_set_apic_id, /* Can be NULL on 32-bit. */
|
||||||
|
|
||||||
.cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
|
|
||||||
.calc_dest_apicid = apic_flat_calc_apicid,
|
.calc_dest_apicid = apic_flat_calc_apicid,
|
||||||
|
|
||||||
#ifdef CONFIG_SMP
|
#ifdef CONFIG_SMP
|
||||||
|
Loading…
Reference in New Issue
Block a user