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arm64: dts: imx8mq-evk: Unbypass audio_pll1
Making audio_pll1 parent of audio_pll1_bypass, will allow setting rates multiple of 8000 for children. After unbypass clk hierarchy looks like this: * osc_25m * audio_pll1 * audio_pll1_bypass * audio_pll1_out * sai2 * sai2_root_clk Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -118,9 +118,9 @@ ethphy0: ethernet-phy@0 {
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&sai2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai2>;
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assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
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assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <24576000>;
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assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1_BYPASS>, <&clk IMX8MQ_CLK_SAI2>;
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assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <0>, <24576000>;
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status = "okay";
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};
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