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[PATCH] x86_64: Remove CONFIG_UNORDERED_IO

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It was a failed experiment - all benchmarks done with it on both AMD
and Intel showed it was a loss. That was probably because the store
buffers of the CPUs for write combining traffic weren't large enough.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Andi Kleen 2006-03-25 16:31:31 +01:00 committed by Linus Torvalds
parent 9d95dd849c
commit ba22f13563
2 changed files with 0 additions and 28 deletions
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10
arch/x86_64/Kconfig
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@ -520,16 +520,6 @@ config PCI_MMCONFIG
bool "Support mmconfig PCI config space access"
depends on PCI && ACPI
config UNORDERED_IO
bool "Unordered IO mapping access"
depends on EXPERIMENTAL
help
Use unordered stores to access IO memory mappings in device drivers.
Still very experimental. When a driver works on IA64/ppc64/pa-risc it should
work with this option, but it makes the drivers behave differently
from i386. Requires that the driver writer used memory barriers
properly.
source "drivers/pci/pcie/Kconfig"
source "drivers/pci/Kconfig"

18
include/asm-x86_64/io.h
View File

@ -200,23 +200,6 @@ static inline __u64 __readq(const volatile void __iomem *addr)
#define mmiowb()
#ifdef CONFIG_UNORDERED_IO
static inline void __writel(__u32 val, volatile void __iomem *addr)
{
volatile __u32 __iomem *target = addr;
asm volatile("movnti %1,%0"
: "=m" (*target)
: "r" (val) : "memory");
}
static inline void __writeq(__u64 val, volatile void __iomem *addr)
{
volatile __u64 __iomem *target = addr;
asm volatile("movnti %1,%0"
: "=m" (*target)
: "r" (val) : "memory");
}
#else
static inline void __writel(__u32 b, volatile void __iomem *addr)
{
*(__force volatile __u32 *)addr = b;
@ -225,7 +208,6 @@ static inline void __writeq(__u64 b, volatile void __iomem *addr)
{
*(__force volatile __u64 *)addr = b;
}
#endif
static inline void __writeb(__u8 b, volatile void __iomem *addr)
{
*(__force volatile __u8 *)addr = b;